I was checking your information in all your comments and a question poped up.
The B+ (the model I have) has 26 GPIO and 2 ID_S* (ID_SD and ID_SC).
I believe tha math would be 50mA/26 GPIO = 1.923mA (near 2mA) per pin.
But in that case tha math is not taking into account those 2 ID_S* pins.
Is this correct?
Should I divide per 28 instead of 26?
There are two
rules you must adhere to!, the first one says each GPIO is capable of 15mA, the second rule says that the total amount of current used for sourcing/sinking may not exceed 50mA. if you have less than for GPIO's each one can do 15mA all by itself, but a fourth one would drive the total over the 50mA limit. if you use
ten GPIO's and its possible their are all sinking or sourcing current at the same time, then you have to divide the 50mA by ten, for 5mA each.
Its about the GPIO's you use
as outputs. The kernel will (try to) read the HAT's EEPROM before booting up your applications, and afterwards those gPIO pins would not be used anymore, so nothing changes about the 15mA and 50mA rules, as at the time they apply the EEPROM GPIO's are out of commission.
by the way, there are some GPIO's used as outputs by the system itself (for things like driving the ACT LED, and PWM audio), but the designers were careful to almost not use any current to drive them, so the 50mA rule wasn't compromised (much).