Inspired by several similar projects using Arduino and other micro-controllers, I decided to try creating a virtual floppy disk emulator using the Pi. The advantage being that the Pi has a full operating system, lots of memory and a lot of GPIO pins.
After several weeks of work I succeeded in getting my ancient TRS-80 to boot from my Raspberry Pi. The interface board between the Pi and the floppy disk edge connector only requires 3 ICs and some termination resistors. The operating system was RiscOS but I think it could also work under one of the Linux distributions with a bit of work. An album of images is at http://s766.beta.photobucket.com/user/a ... l%20Floppy.
Two main challenges were generating the raw floppy disk clock and data signals and detecting the very short 8 μS 'step' signals. The clock and data signals are 1 μS pulses separated by 3 μS gaps. They look something like C___D___C___D___ where C is a clock bit and D is a data bit (which is absent for a '0'). I initially thought to use a 1 μS timer interrupt but quickly discarded that idea as not feasible. Instead I tried the SPI output and set a 1 for a clock or data pulse and 0 for the gaps between pulses. That meant that each bit of floppy disk data would be transmitted as a byte by the SPI hardware. A single-density track using FM modulation contains approx. 3,125 bytes including CRC, padding and other overhead. This would be transformed into 25,000 bytes encoded for SPI transmission.
But when I looked at the actual signal I realized that each SPI byte was separated by a 1 μS gap equal to one clock cycle which slowed down the timing and made the gap between the clock and data bits less than ideal. But, surprisingly, it still works because the floppy disk controller is fairly tolerant about the location of the data bit as long as the clock signal is reliable. So I sped up the SPI clock slightly so that the 8 bits of data plus the gap between bytes took 8 μS so the speed of the virtual disk would be very close to the 300 rpm of an actual drive. Every clock pulse would be exactly 8 μS apart even though the data pulse would show up slightly before the ideal time. Data and clock pulses would be a bit shorter than 1 μS, but well within tolerance.
The Pi SPI fifo needs to be fed a byte every 8 μS using my data rate, but since the fifo can store up to 64 bytes, we have up to 512 μS before the fifo is empty. To play it safe I use a timer interrupt every 200 μS to fill the transmit fifo and empty the receive fifo. The timer interrupt also generates the 4 millisecond index pulse signal at the start of every track.
The second challenge was to pick up the 8 μS step pulse used by the floppy disk controller to step the virtual floppy drive head in and out. Here's where the GPIO rising edge detection made it easy. Setting a rising edge detection on the GPIO pin corresponding to the step signal allowed the BCM2835 do all the hard work of detecting the pulse. All I had to do was check the pulse detection bit every few milliseconds and switch to the desired track.
Currently it is read-only, meaning the computer cannot write to the floppy disk. I may be able to use the SPI slave data input to read the write signal from the floppy disk controller, but I would probably need to double or even quadruple the SPI data rate as the SPI clock and the floppy disk clock would not be synchronized so I would have to sub-sample the input and try to figure out the actual data and clock bits. I probably need to switch to DMA to get the higher data rate reliably as sometimes other interrupts are long enough to cause a gap in the SPI data though the floppy disk controller and operating system are robust enough to automatically detect and recover from such errors.
Details of hardware and software available on request.
Alan Page