Skin Mesh Animation

[bullen]

I'm trying to get my 3D engine to work on GLES.

There is something wrong with the shaders and the program spits out a bunch of assembly at me but I'm not versed enough to understand what it means:

Fragment

Code: Select all

#version 100

precision lowp float;

varying vec2 outTexCoord;
varying vec3 out_Normal;

uniform sampler2D texUnit;

varying float red;
varying float green;
varying float blue;

void main(void) {
    vec3 light = vec3(0, 0, 6); // in view coordinates
        vec4 color = vec4(0.5, 0.5, 0.5, 1.0);

    vec3 normal = normalize(out_Normal);
    float intensity = dot(light, normal);

    if (intensity > 0.95)
                color = vec4(1.0, 1.0, 1.0, 1.0);
        else if (intensity > 0.8)
                color = vec4(0.8, 0.8, 0.8, 1.0);
        else if (intensity > 0.6)
                color = vec4(0.6, 0.6, 0.6, 1.0);
        else
                color = vec4(0.5, 0.5, 0.5, 1.0);

    gl_FragColor = color * texture2D(texUnit, outTexCoord);
}

Vertex

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#version 100

precision highp float;

attribute vec3 in_Position;
attribute vec3 in_Normal;
attribute vec2 in_TexCoord;
attribute vec4 in_Weights;
attribute float in_nrBones;
attribute vec4 in_whichBones;

uniform mat4 modelMatrix;
uniform mat4 viewMatrix;
uniform mat4 projMatrix;
uniform mat4 skinningMatrix[50];

varying vec2 outTexCoord;
varying vec3 out_Normal;

void main(void) {
        int nrBones = int(in_nrBones);
        vec4 boneIndex = in_whichBones;
        vec4 weight = in_Weights;

    outTexCoord = in_TexCoord;

        vec4 tempPosition = vec4(0.0, 0.0, 0.0, 0.0);
        vec4 tempNormal = vec4(0.0, 0.0, 0.0, 0.0);
        mat4 tempMatrix;

        for (int i = 0; i < 4; i++) {
                tempMatrix = weight.x * skinningMatrix[int(boneIndex.x)];
                tempPosition += tempMatrix * vec4(in_Position, 1.0);
                tempNormal += tempMatrix * vec4(in_Normal, 0.0);

                weight = vec4(weight.yzw, weight.x); //rotate weight
                boneIndex = vec4(boneIndex.yzw, boneIndex.x); //rotate bone
    }

        out_Normal = vec3(tempNormal);
        gl_Position = projMatrix * viewMatrix * modelMatrix * tempPosition;
}

Assembly from GLSL? on cerr

Code: Select all

Failed to register allocate:
BLOCK 0:
  0 S   0       mov t0, vpm0.0
  1 S   1       mov t1, vpm0.1
  2 S   2       mov t2, vpm0.2
  3 S   3       mov t3, vpm1.0
  4 S   4       mov t4, vpm1.1
  5 S   5       mov t5, vpm1.2
  6 S   6       mov t6, vpm2.0
  7 S   7       mov t7, vpm2.1
  8 S   8       mov t8, vpm3.0
  9 S   9       mov t9, vpm3.1
 10 S  10       mov t10, vpm3.2
 11 S  11       mov t11, vpm3.3
 12 S  32       ftoi t32, vpm4.0
 13 S  33 E  32 shl t33, t32, 6
 13 S  34       max t34, t33, 0
 14 S  35 E  34 min_noimm t35, t34, u0 (0x00000c7c / 0.000000)
 14       E  35 add tex_s_direct, t35, u1 (??? 12)
 13 S  37       max t37, t33, 0
 14 S  38 E  37 min_noimm t38, t37, u2 (0x00000c78 / 0.000000)
 14       E  38 add tex_s_direct, t38, u3 (??? 12)
 13 S  40       max t40, t33, 0
 14 S  41 E  40 min_noimm t41, t40, u4 (0x00000c74 / 0.000000)
 14       E  41 add tex_s_direct, t41, u5 (??? 12)
 13 S  43       max t43, t33, 0
 14 S  44 E  43 min_noimm t44, t43, u6 (0x00000c70 / 0.000000)
 14       E  44 add tex_s_direct, t44, u7 (??? 12)
 13 S  50       add t50, t33, u8 (0x00000010 / 0.000000)
 14 S  51       max t51, t50, 0
 15 S  52 E  51 min_noimm t52, t51, u9 (0x00000c7c / 0.000000)
 15 S  36       tex_result t36
 16       E  52 add tex_s_direct, t52, u10 (??? 12)
 15 S  54       max t54, t50, 0
 16 S  55 E  54 min_noimm t55, t54, u11 (0x00000c78 / 0.000000)
 16 S  39       tex_result t39
 17       E  55 add tex_s_direct, t55, u12 (??? 12)
 16 S  57       max t57, t50, 0
 17 S  58 E  57 min_noimm t58, t57, u13 (0x00000c74 / 0.000000)
 17 S  42       tex_result t42
 18       E  58 add tex_s_direct, t58, u14 (??? 12)
 17 S  60 E  50 max t60, t50, 0
 17 S  61 E  60 min_noimm t61, t60, u15 (0x00000c70 / 0.000000)
 17 S  45       tex_result t45
 18       E  61 add tex_s_direct, t61, u16 (??? 12)
 17 S  67       add t67, t33, u17 (0x00000020 / 0.000000)
 18 S  68       max t68, t67, 0
 19 S  69 E  68 min_noimm t69, t68, u18 (0x00000c7c / 0.000000)
 19 S  53       tex_result t53
 20       E  69 add tex_s_direct, t69, u19 (??? 12)
 19 S  71       max t71, t67, 0
 20 S  72 E  71 min_noimm t72, t71, u20 (0x00000c78 / 0.000000)
 20 S  56       tex_result t56
 21       E  72 add tex_s_direct, t72, u21 (??? 12)
 20 S  74       max t74, t67, 0
 21 S  75 E  74 min_noimm t75, t74, u22 (0x00000c74 / 0.000000)
 21 S  59       tex_result t59
 22       E  75 add tex_s_direct, t75, u23 (??? 12)
 21 S  77 E  67 max t77, t67, 0
 21 S  78 E  77 min_noimm t78, t77, u24 (0x00000c70 / 0.000000)
 21 S  62       tex_result t62
 22       E  78 add tex_s_direct, t78, u25 (??? 12)
 21 S  84 E  33 add t84, t33, u26 (0x00000030 / 0.000000)
 21 S  85       max t85, t84, 0
 22 S  86 E  85 min_noimm t86, t85, u27 (0x00000c7c / 0.000000)
 22 S  70       tex_result t70
 23       E  86 add tex_s_direct, t86, u28 (??? 12)
 22 S  88       max t88, t84, 0
 23 S  89 E  88 min_noimm t89, t88, u29 (0x00000c78 / 0.000000)
 23 S  73       tex_result t73
 24       E  89 add tex_s_direct, t89, u30 (??? 12)
 23 S  91       max t91, t84, 0
 24 S  92 E  91 min_noimm t92, t91, u31 (0x00000c74 / 0.000000)
 24 S  76       tex_result t76
 25       E  92 add tex_s_direct, t92, u32 (??? 12)
 24 S  94 E  84 max t94, t84, 0
 24 S  95 E  94 min_noimm t95, t94, u33 (0x00000c70 / 0.000000)
 24 S  79       tex_result t79
 25       E  95 add tex_s_direct, t95, u34 (??? 12)
 24 S 140       ftoi t140, vpm4.1
 25 S 141 E 140 shl t141, t140, 6
 25 S 142       max t142, t141, 0
 26 S 143 E 142 min_noimm t143, t142, u35 (0x00000c7c / 0.000000)
 26 S  87       tex_result t87
 27       E 143 add tex_s_direct, t143, u36 (??? 12)
 26 S 145       max t145, t141, 0
 27 S 146 E 145 min_noimm t146, t145, u37 (0x00000c78 / 0.000000)
 27 S  90       tex_result t90
 28       E 146 add tex_s_direct, t146, u38 (??? 12)
 27 S 148       max t148, t141, 0
 28 S 149 E 148 min_noimm t149, t148, u39 (0x00000c74 / 0.000000)
 28 S  93       tex_result t93
 29       E 149 add tex_s_direct, t149, u40 (??? 12)
 28 S 151       max t151, t141, 0
 29 S 152 E 151 min_noimm t152, t151, u41 (0x00000c70 / 0.000000)
 29 S  96       tex_result t96
 30       E 152 add tex_s_direct, t152, u42 (??? 12)
 29 S 158       add t158, t141, u43 (0x00000010 / 0.000000)
 30 S 159       max t159, t158, 0
 31 S 160 E 159 min_noimm t160, t159, u44 (0x00000c7c / 0.000000)
 31 S 144       tex_result t144
 32       E 160 add tex_s_direct, t160, u45 (??? 12)
 31 S 162       max t162, t158, 0
 32 S 163 E 162 min_noimm t163, t162, u46 (0x00000c78 / 0.000000)
 32 S 147       tex_result t147
 33       E 163 add tex_s_direct, t163, u47 (??? 12)
 32 S 165       max t165, t158, 0
 33 S 166 E 165 min_noimm t166, t165, u48 (0x00000c74 / 0.000000)
 33 S 150       tex_result t150
 34       E 166 add tex_s_direct, t166, u49 (??? 12)
 33 S 168 E 158 max t168, t158, 0
 33 S 169 E 168 min_noimm t169, t168, u50 (0x00000c70 / 0.000000)
 33 S 153       tex_result t153
 34       E 169 add tex_s_direct, t169, u51 (??? 12)
 33 S 175       add t175, t141, u52 (0x00000020 / 0.000000)
 34 S 176       max t176, t175, 0
 35 S 177 E 176 min_noimm t177, t176, u53 (0x00000c7c / 0.000000)
 35 S 161       tex_result t161
 36       E 177 add tex_s_direct, t177, u54 (??? 12)
 35 S 179       max t179, t175, 0
 36 S 180 E 179 min_noimm t180, t179, u55 (0x00000c78 / 0.000000)
 36 S 164       tex_result t164
 37       E 180 add tex_s_direct, t180, u56 (??? 12)
 36 S 182       max t182, t175, 0
 37 S 183 E 182 min_noimm t183, t182, u57 (0x00000c74 / 0.000000)
 37 S 167       tex_result t167
 38       E 183 add tex_s_direct, t183, u58 (??? 12)
 37 S 185 E 175 max t185, t175, 0
 37 S 186 E 185 min_noimm t186, t185, u59 (0x00000c70 / 0.000000)
 37 S 170       tex_result t170
 38       E 186 add tex_s_direct, t186, u60 (??? 12)
 37 S 192 E 141 add t192, t141, u61 (0x00000030 / 0.000000)
 37 S 193       max t193, t192, 0
 38 S 194 E 193 min_noimm t194, t193, u62 (0x00000c7c / 0.000000)
 38 S 178       tex_result t178
 39       E 194 add tex_s_direct, t194, u63 (??? 12)
 38 S 196       max t196, t192, 0
 39 S 197 E 196 min_noimm t197, t196, u64 (0x00000c78 / 0.000000)
 39 S 181       tex_result t181
 40       E 197 add tex_s_direct, t197, u65 (??? 12)
 39 S 199       max t199, t192, 0
 40 S 200 E 199 min_noimm t200, t199, u66 (0x00000c74 / 0.000000)
 40 S 184       tex_result t184
 41       E 200 add tex_s_direct, t200, u67 (??? 12)
 40 S 202 E 192 max t202, t192, 0
 40 S 203 E 202 min_noimm t203, t202, u68 (0x00000c70 / 0.000000)
 40 S 187       tex_result t187
 41       E 203 add tex_s_direct, t203, u69 (??? 12)
 40 S 255       ftoi t255, vpm4.2
 41 S 256 E 255 shl t256, t255, 6
 41 S 257       max t257, t256, 0
 42 S 258 E 257 min_noimm t258, t257, u70 (0x00000c7c / 0.000000)
 42 S 195       tex_result t195
 43       E 258 add tex_s_direct, t258, u71 (??? 12)
 42 S 260       max t260, t256, 0
 43 S 261 E 260 min_noimm t261, t260, u72 (0x00000c78 / 0.000000)
 43 S 198       tex_result t198
 44       E 261 add tex_s_direct, t261, u73 (??? 12)
 43 S 263       max t263, t256, 0
 44 S 264 E 263 min_noimm t264, t263, u74 (0x00000c74 / 0.000000)
 44 S 201       tex_result t201
 45       E 264 add tex_s_direct, t264, u75 (??? 12)
 44 S 266       max t266, t256, 0
 45 S 267 E 266 min_noimm t267, t266, u76 (0x00000c70 / 0.000000)
 45 S 204       tex_result t204
 46       E 267 add tex_s_direct, t267, u77 (??? 12)
 45 S 273       add t273, t256, u78 (0x00000010 / 0.000000)
 46 S 274       max t274, t273, 0
 47 S 275 E 274 min_noimm t275, t274, u79 (0x00000c7c / 0.000000)
 47 S 259       tex_result t259
 48       E 275 add tex_s_direct, t275, u80 (??? 12)
 47 S 277       max t277, t273, 0
 48 S 278 E 277 min_noimm t278, t277, u81 (0x00000c78 / 0.000000)
 48 S 262       tex_result t262
 49       E 278 add tex_s_direct, t278, u82 (??? 12)
 48 S 280       max t280, t273, 0
 49 S 281 E 280 min_noimm t281, t280, u83 (0x00000c74 / 0.000000)
 49 S 265       tex_result t265
 50       E 281 add tex_s_direct, t281, u84 (??? 12)
 49 S 283 E 273 max t283, t273, 0
 49 S 284 E 283 min_noimm t284, t283, u85 (0x00000c70 / 0.000000)
 49 S 268       tex_result t268
 50       E 284 add tex_s_direct, t284, u86 (??? 12)
 49 S 290       add t290, t256, u87 (0x00000020 / 0.000000)
 50 S 291       max t291, t290, 0
 51 S 292 E 291 min_noimm t292, t291, u88 (0x00000c7c / 0.000000)
 51 S 276       tex_result t276
 52       E 292 add tex_s_direct, t292, u89 (??? 12)
 51 S 294       max t294, t290, 0
 52 S 295 E 294 min_noimm t295, t294, u90 (0x00000c78 / 0.000000)
 52 S 279       tex_result t279
 53       E 295 add tex_s_direct, t295, u91 (??? 12)
 52 S 297       max t297, t290, 0
 53 S 298 E 297 min_noimm t298, t297, u92 (0x00000c74 / 0.000000)
 53 S 282       tex_result t282
 54       E 298 add tex_s_direct, t298, u93 (??? 12)
 53 S 300 E 290 max t300, t290, 0
 53 S 301 E 300 min_noimm t301, t300, u94 (0x00000c70 / 0.000000)
 53 S 285       tex_result t285
 54       E 301 add tex_s_direct, t301, u95 (??? 12)
 53 S 307 E 256 add t307, t256, u96 (0x00000030 / 0.000000)
 53 S 308       max t308, t307, 0
 54 S 309 E 308 min_noimm t309, t308, u97 (0x00000c7c / 0.000000)
 54 S 293       tex_result t293
 55       E 309 add tex_s_direct, t309, u98 (??? 12)
 54 S 311       max t311, t307, 0
 55 S 312 E 311 min_noimm t312, t311, u99 (0x00000c78 / 0.000000)
 55 S 296       tex_result t296
 56       E 312 add tex_s_direct, t312, u100 (??? 12)
 55 S 314       max t314, t307, 0
 56 S 315 E 314 min_noimm t315, t314, u101 (0x00000c74 / 0.000000)
 56 S 299       tex_result t299
 57       E 315 add tex_s_direct, t315, u102 (??? 12)
 56 S 317 E 307 max t317, t307, 0
 56 S 318 E 317 min_noimm t318, t317, u103 (0x00000c70 / 0.000000)
 56 S 302       tex_result t302
 57       E 318 add tex_s_direct, t318, u104 (??? 12)
 56 S 370       ftoi t370, vpm4.3
 57 S 371 E 370 shl t371, t370, 6
 57 S 372       max t372, t371, 0
 58 S 373 E 372 min_noimm t373, t372, u105 (0x00000c7c / 0.000000)
 58 S 310       tex_result t310
 59       E 373 add tex_s_direct, t373, u106 (??? 12)
 58 S 375       max t375, t371, 0
 59 S 376 E 375 min_noimm t376, t375, u107 (0x00000c78 / 0.000000)
 59 S 313       tex_result t313
 60       E 376 add tex_s_direct, t376, u108 (??? 12)
 59 S 378       max t378, t371, 0
 60 S 379 E 378 min_noimm t379, t378, u109 (0x00000c74 / 0.000000)
 60 S 316       tex_result t316
 61       E 379 add tex_s_direct, t379, u110 (??? 12)
 60 S 381       max t381, t371, 0
 61 S 382 E 381 min_noimm t382, t381, u111 (0x00000c70 / 0.000000)
 61 S 319       tex_result t319
 62       E 382 add tex_s_direct, t382, u112 (??? 12)
 61 S 388       add t388, t371, u113 (0x00000010 / 0.000000)
 62 S 389       max t389, t388, 0
 63 S 390 E 389 min_noimm t390, t389, u114 (0x00000c7c / 0.000000)
 63 S 374       tex_result t374
 64       E 390 add tex_s_direct, t390, u115 (??? 12)
 63 S 392       max t392, t388, 0
 64 S 393 E 392 min_noimm t393, t392, u116 (0x00000c78 / 0.000000)
 64 S 377       tex_result t377
 65       E 393 add tex_s_direct, t393, u117 (??? 12)
 64 S 395       max t395, t388, 0
 65 S 396 E 395 min_noimm t396, t395, u118 (0x00000c74 / 0.000000)
 65 S 380       tex_result t380
 66       E 396 add tex_s_direct, t396, u119 (??? 12)
 65 S 398 E 388 max t398, t388, 0
 65 S 399 E 398 min_noimm t399, t398, u120 (0x00000c70 / 0.000000)
 65 S 383       tex_result t383
 66       E 399 add tex_s_direct, t399, u121 (??? 12)
 65 S  46 E  36 fmul t46, t36, t8
 65 S  63 E  53 fmul t63, t53, t8
 65 S 101       fmul t101, t46, t0
 66 S 105       fmul t105, t63, t1
 67 S 109 E 101, E 105 fadd t109, t101, t105
 66 S 125 E  46 fmul t125, t46, t3
 66 S 128 E  63 fmul t128, t63, t4
 66 S 131 E 125, E 128 fadd t131, t125, t128
 65 S 405       add t405, t371, u122 (0x00000020 / 0.000000)
 66 S 406       max t406, t405, 0
 67 S 407 E 406 min_noimm t407, t406, u123 (0x00000c7c / 0.000000)
 67 S 391       tex_result t391
 68       E 407 add tex_s_direct, t407, u124 (??? 12)
 67 S 409       max t409, t405, 0
 68 S 410 E 409 min_noimm t410, t409, u125 (0x00000c78 / 0.000000)
 68 S 394       tex_result t394
 69       E 410 add tex_s_direct, t410, u126 (??? 12)
 68 S 412       max t412, t405, 0
 69 S 413 E 412 min_noimm t413, t412, u127 (0x00000c74 / 0.000000)
 69 S 397       tex_result t397
 70       E 413 add tex_s_direct, t413, u128 (??? 12)
 69 S 415 E 405 max t415, t405, 0
 69 S 416 E 415 min_noimm t416, t415, u129 (0x00000c70 / 0.000000)
 69 S 400       tex_result t400
 70       E 416 add tex_s_direct, t416, u130 (??? 12)
 69 S  47 E  39 fmul t47, t39, t8
 69 S  64 E  56 fmul t64, t56, t8
 69 S 102       fmul t102, t47, t0
 70 S 106       fmul t106, t64, t1
 71 S 110 E 102, E 106 fadd t110, t102, t106
 70 S  48 E  42 fmul t48, t42, t8
 70 S  65 E  59 fmul t65, t59, t8
 70 S 103       fmul t103, t48, t0
 71 S 107       fmul t107, t65, t1
 72 S 111 E 103, E 107 fadd t111, t103, t107
 71 S  49 E  45 fmul t49, t45, t8
 71 S 104 E  49 fmul t104, t49, t0
 71 S  66 E  62 fmul t66, t62, t8
 71 S 108 E  66 fmul t108, t66, t1
 71 S 112 E 104, E 108 fadd t112, t104, t108
 70 S  80 E  70 fmul t80, t70, t8
 70 S 113       fmul t113, t80, t2
 71 S 117 E 109, E 113 fadd t117, t109, t113
 70 S 134 E  80 fmul t134, t80, t5
 70 S 137 E 131, E 134 fadd t137, t131, t134
 69 S  81 E  73 fmul t81, t73, t8
 69 S 114       fmul t114, t81, t2
 70 S 118 E 110, E 114 fadd t118, t110, t114
 69 S  82 E  76 fmul t82, t76, t8
 69 S 115       fmul t115, t82, t2
 70 S 119 E 111, E 115 fadd t119, t111, t115
 69 S  83 E  79 fmul t83, t79, t8
 69 S 116 E  83 fmul t116, t83, t2
 69 S 120 E 112, E 116 fadd t120, t112, t116
 68 S  97 E  87 fmul t97, t87, t8
 68 S 121 E  97, E 117 fadd t121, t117, t97
 67 S  98 E  90 fmul t98, t90, t8
 67 S 122 E  98, E 118 fadd t122, t118, t98
 66 S  99 E  93 fmul t99, t93, t8
 66 S 100 E   8, E  96 fmul t100, t96, t8
 65 S 123 E  99, E 119 fadd t123, t119, t99
 64 S 124 E 100, E 120 fadd t124, t120, t100
 63 S 154 E 144 fmul t154, t144, t9
 63 S 171 E 161 fmul t171, t161, t9
 63 S 237       fmul t237, t154, t3
 64 S 240       fmul t240, t171, t4
 65 S 243 E 237, E 240 fadd t243, t237, t240
 64 S 209 E 154 fmul t209, t154, t0
 64 S 213 E 171 fmul t213, t171, t1
 64 S 217 E 209, E 213 fadd t217, t209, t213
 63 S 155 E 147 fmul t155, t147, t9
 63 S 172 E 164 fmul t172, t164, t9
 63 S 210       fmul t210, t155, t0
 64 S 214       fmul t214, t172, t1
 65 S 218 E 210, E 214 fadd t218, t210, t214
 64 S 156 E 150 fmul t156, t150, t9
 64 S 173 E 167 fmul t173, t167, t9
 64 S 211       fmul t211, t156, t0
 65 S 215       fmul t215, t173, t1
 66 S 219 E 211, E 215 fadd t219, t211, t215
 65 S 157 E 153 fmul t157, t153, t9
 65 S 212 E 157 fmul t212, t157, t0
 65 S 174 E 170 fmul t174, t170, t9
 65 S 216 E 174 fmul t216, t174, t1
 65 S 220 E 212, E 216 fadd t220, t212, t216
 64 S 188 E 178 fmul t188, t178, t9
 64 S 246       fmul t246, t188, t5
 65 S 249 E 243, E 246 fadd t249, t243, t246
 64 S 221 E 188 fmul t221, t188, t2
 64 S 225 E 217, E 221 fadd t225, t217, t221
 63 S 189 E 181 fmul t189, t181, t9
 63 S 222       fmul t222, t189, t2
 64 S 226 E 218, E 222 fadd t226, t218, t222
 63 S 252 E 137, E 249 fadd t252, t137, t249
 62 S 190 E 184 fmul t190, t184, t9
 62 S 223       fmul t223, t190, t2
 63 S 227 E 219, E 223 fadd t227, t219, t223
 62 S 191 E 187 fmul t191, t187, t9
 62 S 224 E 191 fmul t224, t191, t2
 62 S 228 E 220, E 224 fadd t228, t220, t224
 61 S 205 E 195 fmul t205, t195, t9
 61 S 229 E 205, E 225 fadd t229, t225, t205
 60 S 206 E 198 fmul t206, t198, t9
 60 S 230 E 206, E 226 fadd t230, t226, t206
 59 S 233 E 121, E 229 fadd t233, t121, t229
 58 S 207 E 201 fmul t207, t201, t9
 58 S 208 E   9, E 204 fmul t208, t204, t9
 57 S 231 E 207, E 227 fadd t231, t227, t207
 56 S 234 E 122, E 230 fadd t234, t122, t230
 55 S 422 E 371 add t422, t371, u131 (0x00000030 / 0.000000)
 55 S 423       max t423, t422, 0
 56 S 424 E 423 min_noimm t424, t423, u132 (0x00000c7c / 0.000000)
 56 S 408       tex_result t408
 57       E 424 add tex_s_direct, t424, u133 (??? 12)
 56 S 426       max t426, t422, 0
 57 S 427 E 426 min_noimm t427, t426, u134 (0x00000c78 / 0.000000)
 57 S 411       tex_result t411
 58       E 427 add tex_s_direct, t427, u135 (??? 12)
 57 S 429       max t429, t422, 0
 58 S 430 E 429 min_noimm t430, t429, u136 (0x00000c74 / 0.000000)
 58 S 414       tex_result t414
 59       E 430 add tex_s_direct, t430, u137 (??? 12)
 58 S 432 E 422 max t432, t422, 0
 58 S 433 E 432 min_noimm t433, t432, u138 (0x00000c70 / 0.000000)
 58 S 417       tex_result t417
 59       E 433 add tex_s_direct, t433, u139 (??? 12)
 58 S 232 E 208, E 228 fadd t232, t228, t208
 57 S 235 E 123, E 231 fadd t235, t123, t231
 56 S 236 E 124, E 232 fadd t236, t124, t232
 55 S 269 E 259 fmul t269, t259, t10
 55 S 286 E 276 fmul t286, t276, t10
 55 S 352       fmul t352, t269, t3
 56 S 355       fmul t355, t286, t4
 57 S 358 E 352, E 355 fadd t358, t352, t355
 56 S 324 E 269 fmul t324, t269, t0
 56 S 328 E 286 fmul t328, t286, t1
 56 S 332 E 324, E 328 fadd t332, t324, t328
 55 S 270 E 262 fmul t270, t262, t10
 55 S 287 E 279 fmul t287, t279, t10
 55 S 325       fmul t325, t270, t0
 56 S 329       fmul t329, t287, t1
 57 S 333 E 325, E 329 fadd t333, t325, t329
 56 S 271 E 265 fmul t271, t265, t10
 56 S 288 E 282 fmul t288, t282, t10
 56 S 326       fmul t326, t271, t0
 57 S 330       fmul t330, t288, t1
 58 S 334 E 326, E 330 fadd t334, t326, t330
 57 S 272 E 268 fmul t272, t268, t10
 57 S 327 E 272 fmul t327, t272, t0
 57 S 289 E 285 fmul t289, t285, t10
 57 S 331 E 289 fmul t331, t289, t1
 57 S 335 E 327, E 331 fadd t335, t327, t331
 56 S 303 E 293 fmul t303, t293, t10
 56 S 361       fmul t361, t303, t5
 57 S 364 E 358, E 361 fadd t364, t358, t361
 56 S 336 E 303 fmul t336, t303, t2
 56 S 340 E 332, E 336 fadd t340, t332, t336
 55 S 304 E 296 fmul t304, t296, t10
 55 S 337       fmul t337, t304, t2
 56 S 341 E 333, E 337 fadd t341, t333, t337
 55 S 367 E 252, E 364 fadd t367, t252, t364
 54 S 305 E 299 fmul t305, t299, t10
 54 S 338       fmul t338, t305, t2
 55 S 342 E 334, E 338 fadd t342, t334, t338
 54 S 306 E 302 fmul t306, t302, t10
 54 S 339 E 306 fmul t339, t306, t2
 54 S 343 E 335, E 339 fadd t343, t335, t339
 53 S 320 E 310 fmul t320, t310, t10
 53 S 344 E 320, E 340 fadd t344, t340, t320
 52 S 321 E 313 fmul t321, t313, t10
 52 S 345 E 321, E 341 fadd t345, t341, t321
 51 S 348 E 233, E 344 fadd t348, t233, t344
 50 S 322 E 316 fmul t322, t316, t10
 50 S 323 E  10, E 319 fmul t323, t319, t10
 49 S 346 E 322, E 342 fadd t346, t342, t322
 48 S 349 E 234, E 345 fadd t349, t234, t345
 47 S 347 E 323, E 343 fadd t347, t343, t323
 46 S 350 E 235, E 346 fadd t350, t235, t346
 45 S 351 E 236, E 347 fadd t351, t236, t347
 44 S 384 E 374 fmul t384, t374, t11
 44 S 401 E 391 fmul t401, t391, t11
 44 S 439       fmul t439, t384, t0
 45 S 443       fmul t443, t401, t1
 46 S 447 E 439, E 443 fadd t447, t439, t443
 45 S 467 E 384 fmul t467, t384, t3
 45 S 470 E 401 fmul t470, t401, t4
 45 S 473 E 467, E 470 fadd t473, t467, t470
 44 S 385 E 377 fmul t385, t377, t11
 44 S 402 E 394 fmul t402, t394, t11
 44 S 440       fmul t440, t385, t0
 45 S 444       fmul t444, t402, t1
 46 S 448 E 440, E 444 fadd t448, t440, t444
 45 S 386 E 380 fmul t386, t380, t11
 45 S 387 E 383 fmul t387, t383, t11
 45 S 442 E 387 fmul t442, t387, t0
 45 S 441 E   0 fmul t441, t386, t0
 45 S 403 E 397 fmul t403, t397, t11
 45 S 404 E 400 fmul t404, t400, t11
 45 S 446 E 404 fmul t446, t404, t1
 45 S 445 E   1 fmul t445, t403, t1
 45 S 449 E 441, E 445 fadd t449, t441, t445
 44 S 450 E 442, E 446 fadd t450, t442, t446
 43 S 418 E 408 fmul t418, t408, t11
 43 S 451       fmul t451, t418, t2
 44 S 455 E 447, E 451 fadd t455, t447, t451
 43 S 476 E 418 fmul t476, t418, t5
 43 S 479 E 473, E 476 fadd t479, t473, t476
 42 S 419 E 411 fmul t419, t411, t11
 42 S 452       fmul t452, t419, t2
 43 S 456 E 448, E 452 fadd t456, t448, t452
 42 S 420 E 414 fmul t420, t414, t11
 42 S 421 E 417 fmul t421, t417, t11
 42 S 454 E 421 fmul t454, t421, t2
 42 S 453 E   2 fmul t453, t420, t2
 42 S 457 E 449, E 453 fadd t457, t449, t453
 41 S 458 E 450, E 454 fadd t458, t450, t454
 40 S 425       tex_result t425
 41 S 435 E 425 fmul t435, t425, t11
 41 S 459 E 435, E 455 fadd t459, t455, t435
 40 S 428       tex_result t428
 41 S 436 E 428 fmul t436, t428, t11
 41 S 460 E 436, E 456 fadd t460, t456, t436
 40 S 463 E 348, E 459 fadd t463, t348, t459
 39 S 431       tex_result t431
 40 S 437 E 431 fmul t437, t431, t11
 40 S 434       tex_result t434
 41 S 438 E  11, E 434 fmul t438, t434, t11
 40 S 461 E 437, E 457 fadd t461, t457, t437
 39 S 464 E 349, E 460 fadd t464, t349, t460
 38 S 462 E 438, E 458 fadd t462, t458, t438
 37 S 465 E 350, E 461 fadd t465, t350, t461
 36 S 486       fmul t486, u140 (unif[1]), t463
 37 S 490       fmul t490, u141 (unif[5]), t464
 38 S 494 E 486, E 490 fadd t494, t486, t490
 37 S 485       fmul t485, u142 (unif[0]), t463
 38 S 489       fmul t489, u143 (unif[4]), t464
 39 S 493 E 485, E 489 fadd t493, t485, t489
 38 S 487       fmul t487, u144 (unif[2]), t463
 39 S 491       fmul t491, u145 (unif[6]), t464
 40 S 495 E 487, E 491 fadd t495, t487, t491
 39 S 488 E 463 fmul t488, u146 (unif[3]), t463
 39 S 492 E 464 fmul t492, u147 (unif[7]), t464
 39 S 496 E 488, E 492 fadd t496, t488, t492
 38 S 466 E 351, E 462 fadd t466, t351, t462
 37 S 498       fmul t498, u148 (unif[9]), t465
 38 S 502 E 494, E 498 fadd t502, t494, t498
 37 S 497       fmul t497, u149 (unif[8]), t465
 38 S 501 E 493, E 497 fadd t501, t493, t497
 37 S 499       fmul t499, u150 (unif[10]), t465
 38 S 503 E 495, E 499 fadd t503, t495, t499
 37 S 500 E 465 fmul t500, u151 (unif[11]), t465
 37 S 504 E 496, E 500 fadd t504, t496, t500
 36 S 506       fmul t506, u152 (unif[13]), t466
 37 S 510 E 502, E 506 fadd t510, t502, t506
 36 S 505       fmul t505, u153 (unif[12]), t466
 37 S 509 E 501, E 505 fadd t509, t501, t505
 36 S 507       fmul t507, u154 (unif[14]), t466
 37 S 511 E 503, E 507 fadd t511, t503, t507
 36 S 508 E 466 fmul t508, u155 (unif[15]), t466
 36 S 512 E 504, E 508 fadd t512, t504, t508
 35 S 518       fmul t518, u156 (unif[21]), t510
 36 S 514       fmul t514, u157 (unif[17]), t509
 37 S 522 E 514, E 518 fadd t522, t514, t518
 36 S 517       fmul t517, u158 (unif[20]), t510
 37 S 513       fmul t513, u159 (unif[16]), t509
 38 S 521 E 513, E 517 fadd t521, t513, t517
 37 S 519       fmul t519, u160 (unif[22]), t510
 38 S 515       fmul t515, u161 (unif[18]), t509
 39 S 523 E 515, E 519 fadd t523, t515, t519
 38 S 520 E 510 fmul t520, u162 (unif[23]), t510
 38 S 516 E 509 fmul t516, u163 (unif[19]), t509
 38 S 524 E 516, E 520 fadd t524, t516, t520
 37 S 526       fmul t526, u164 (unif[25]), t511
 38 S 530 E 522, E 526 fadd t530, t522, t526
 37 S 525       fmul t525, u165 (unif[24]), t511
 38 S 529 E 521, E 525 fadd t529, t521, t525
 37 S 527       fmul t527, u166 (unif[26]), t511
 38 S 531 E 523, E 527 fadd t531, t523, t527
 37 S 528 E 511 fmul t528, u167 (unif[27]), t511
 37 S 532 E 524, E 528 fadd t532, t524, t528
 36 S 534       fmul t534, u168 (unif[29]), t512
 37 S 538 E 530, E 534 fadd t538, t530, t534
 36 S 533       fmul t533, u169 (unif[28]), t512
 37 S 537 E 529, E 533 fadd t537, t529, t533
 36 S 535       fmul t535, u170 (unif[30]), t512
 37 S 539 E 531, E 535 fadd t539, t531, t535
 36 S 536 E 512 fmul t536, u171 (unif[31]), t512
 36 S 540 E 532, E 536 fadd t540, t532, t536
 35 S 548       fmul t548, u172 (unif[39]), t538
 36 S 544       fmul t544, u173 (unif[35]), t537
 37 S 552 E 544, E 548 fadd t552, t544, t548
 36 S 545       fmul t545, u174 (unif[36]), t538
 37 S 541       fmul t541, u175 (unif[32]), t537
 38 S 549 E 541, E 545 fadd t549, t541, t545
 37 S 546       fmul t546, u176 (unif[37]), t538
 38 S 542       fmul t542, u177 (unif[33]), t537
 39 S 550 E 542, E 546 fadd t550, t542, t546
 38 S 547 E 538 fmul t547, u178 (unif[38]), t538
 38 S 543 E 537 fmul t543, u179 (unif[34]), t537
 38 S 551 E 543, E 547 fadd t551, t543, t547
 37 S 556       fmul t556, u180 (unif[43]), t539
 38 S 560 E 552, E 556 fadd t560, t552, t556
 37 S 553       fmul t553, u181 (unif[40]), t539
 38 S 557 E 549, E 553 fadd t557, t549, t553
 37 S 554       fmul t554, u182 (unif[41]), t539
 38 S 558 E 550, E 554 fadd t558, t550, t554
 37 S 555 E 539 fmul t555, u183 (unif[42]), t539
 37 S 559 E 551, E 555 fadd t559, t551, t555
 36 S 564       fmul t564, u184 (unif[47]), t540
 37 S 568 E 560, E 564 fadd t568, t560, t564
 36 S 561       fmul t561, u185 (unif[44]), t540
 37 S 565 E 557, E 561 fadd t565, t557, t561
 36 S 562       fmul t562, u186 (unif[45]), t540
 37 S 578       rcp t578, t568
 38 S 566 E 558, E 562 fadd t566, t558, t562
 37 S 563 E 540 fmul t563, u187 (unif[46]), t540
 37 S 567 E 559, E 563 fadd t567, t559, t563
 36 S 579 E 568 fmul t579, t568, t578
 36 S 580 E 579 fsub t580, 2.000000, t579
 36 S 581 E 578, E 580 fmul t581, t578, t580
 35 S 583 E 565 fmul t583, t565, u188 (vp_x_scale)
 35 S 585 E 566 fmul t585, t566, u189 (vp_y_scale)
 35 S 584 E 583 fmul t584, t583, t581
 35 S 586 E 585 fmul t586, t585, t581
 35 S 582 E 584 ftoi t582.16a, t584
 35       E 586 ftoi t582.16b, t586
 34       E 582 mov vpm, t582
 33 S 587 E 567 fmul t587, t567, u190 (vp_z_scale)
 33 S 588 E 587 fmul t588, t587, t581
 33       E 588 fadd vpm, t588, u191 (vp_z_offset)
 32       E 581 mov vpm, t581
 31       E   6 mov vpm, t6
 30       E   7 mov vpm, t7
 29       E 367, E 479 fadd vpm, t367, t479
 27 S 126 E  47 fmul t126, t47, t3
 27 S 129 E  64 fmul t129, t64, t4
 27 S 132 E 126, E 129 fadd t132, t126, t129
 26 S 135 E  81 fmul t135, t81, t5
 26 S 138 E 132, E 135 fadd t138, t132, t135
 25 S 238 E 155 fmul t238, t155, t3
 25 S 241 E 172 fmul t241, t172, t4
 25 S 244 E 238, E 241 fadd t244, t238, t241
 24 S 247 E 189 fmul t247, t189, t5
 24 S 250 E 244, E 247 fadd t250, t244, t247
 23 S 253 E 138, E 250 fadd t253, t138, t250
 22 S 353 E 270 fmul t353, t270, t3
 22 S 356 E 287 fmul t356, t287, t4
 22 S 359 E 353, E 356 fadd t359, t353, t356
 21 S 362 E 304 fmul t362, t304, t5
 21 S 365 E 359, E 362 fadd t365, t359, t362
 20 S 368 E 253, E 365 fadd t368, t253, t365
 19 S 468 E 385 fmul t468, t385, t3
 19 S 471 E 402 fmul t471, t402, t4
 19 S 474 E 468, E 471 fadd t474, t468, t471
 18 S 477 E 419 fmul t477, t419, t5
 18 S 480 E 474, E 477 fadd t480, t474, t477
 17       E 368, E 480 fadd vpm, t368, t480
 15 S 127 E  48 fmul t127, t48, t3
 15 S 130 E  65 fmul t130, t65, t4
 15 S 133 E 127, E 130 fadd t133, t127, t130
 14 S 136 E  82 fmul t136, t82, t5
 14 S 139 E 133, E 136 fadd t139, t133, t136
 13 S 239 E 156 fmul t239, t156, t3
 13 S 242 E 173 fmul t242, t173, t4
 13 S 245 E 239, E 242 fadd t245, t239, t242
 12 S 248 E 190 fmul t248, t190, t5
 12 S 251 E 245, E 248 fadd t251, t245, t248
 11 S 254 E 139, E 251 fadd t254, t139, t251
 10 S 354 E 271 fmul t354, t271, t3
 10 S 357 E 288 fmul t357, t288, t4
 10 S 360 E 354, E 357 fadd t360, t354, t357
  9 S 363 E 305 fmul t363, t305, t5
  9 S 366 E 360, E 363 fadd t366, t360, t363
  8 S 369 E 254, E 366 fadd t369, t254, t366
  7 S 469 E   3, E 386 fmul t469, t386, t3
  6 S 472 E   4, E 403 fmul t472, t403, t4
  5 S 475 E 469, E 472 fadd t475, t469, t472
  4 S 478 E   5, E 420 fmul t478, t420, t5
  3 S 481 E 475, E 478 fadd t481, t475, t478
  2       E 369, E 481 fadd vpm, t369, t481

Google gives nothing, has anyone published working skin mesh shaders anywhere on the internet for GLES?

[Daniel Gessel]

I’m not sure either, but will it compile if you reduce the number of skinning matrices from 50 down to, say 4? I don’t think it’s videocore disassembly, but rather an intermediate step in compilation. It’s not a huge shader... I’m surprised it’s failing to allocate registers, but the large array of uniforms stands out.

[bullen]

Ok, I tried that too but still fails.

For reference someone found the line in Anholts source that pukes on my shaders:

https://github.com/anholt/mesa/blob/mas ... ate.c#L443

Another proposed changing the index array to short from int, now atleast I know that I must optimize my already minimalist shaders more.

Edit: I tried all suggestions now, and unless someone has any better ideas I will now abandon raspberry from my target devices.

Sad day, but it's (or I'm) really not good enough it seems.

[Daniel Gessel]

I haven’t spent much time with the VC (or Linux GPU) stack - I’m new at this. But on AMD GCN, the compiler can spill registers to scratch in video memory, so we just go slow instead of fail. My understanding is VC4 cannot write directly from shader code, so spilling is not an option. I’ve heard that VC6 can read and write from the shader, so the compiler ought to be able to implement spilling for Pi4 assuming there’s a way to manage temporary allocations as shaders are invoked throughout the graphics pipe.

Trimming aggressively (e.g. output a constant for normals) until something gets through, then finding the “edge” is what I would try...

[bullen]

Aha!

I'll try on the Pi4 after they release next patch then!

Right now the VC6 drivers are a complete mess.

Edit: I have given this enough attention for a while, how can you design a GPU that can't even handle the most basic skin mesh animation with 50 bones? No wonder nobody made anything useful for the Raspberry.

I'm thinking Android/Nintendo or Nvidia Jetson Nano for the next attempt.

Who knew saving the planet from 200W machines or walled gardens was going to be such a struggle.

[bullen]

Ok, something works on the pi 4!

I don't have time to test more today, but merry christmas!

Edit: Actually, everything works! 100x non-instanced animations at 24 FPS!

Best Christmas since I got my C64 in 1986!

[mp4]http://move.rupy.se/file/20191224_174706.mp4[/mp4]

Update:

Here is a couple of posts showing the rpi 4 running my C+ MMO engine:

http://talk.binarytask.com/task?id=4064110776042269443
http://talk.binarytask.com/task?id=5085281156123275887

To give you some perspective, the VC6 core is 1/3 as good as the 4000HD in Ivy Bridge Intel CPUs from 2012 at 1/10th of the energy.

The game is GPU bound as I scale up the number of non-instanced animations to 100x@24FPS (in the video it's 25x@60FPS), so looking at this I have an upgrade option to the Jetson Nano which should be CPU bound.

Edit2: It seems the VC6 has automatic frustrum culling? Can someone confirm/explain?

[Technocolour]

Ok, something works on the pi 4!

I don't have time to test more today, but merry christmas!

Edit: Actually, everything works! 100x non-instanced animations at 24 FPS!

Best Christmas since I got my C64 in 1986!

[mp4]http://move.rupy.se/file/20191224_174706.mp4[/mp4]

To give you some perspective, the VC6 core is 1/3 as good as the 4000HD in Ivy Bridge Intel CPUs from 2012 at 1/10th of the energy.

The game is GPU bound as I scale up the number of non-instanced animations to 100x@24FPS (in the video it's 25x@60FPS), so looking at this I have an upgrade option to the Jetson Nano which should be CPU bound.

Edit2: It seems the VC6 has automatic frustrum culling? Can someone confirm/explain?

Great!

What made everything work?

[bullen]

Switching to the Pi 4.

The VC4 is not a proper GPU; it's just a toy, you can't make anything real with it.

The VC6 is closer to modern Android devices; still weak, but powerful enough for a MMO!

[rpdom]

The VC4 is not a proper GPU; it's just a toy, you can't make anything real with it.

It's funny then that many companies have been making very real things using the VC4 based Compute Modules.

[bullen]

I meant in the realm of 3D games.

Why don't you mention one example while you're at it?

[rpdom]

NEC for one with their monitors.

There are many others. Not just using the CM, but other models too. It has been stated that shortages of some models have been due to some companies buying up large numbers.

Don't care about games. I'm talking about real applications.

[Daniel Gessel]

The VC4 is certainly underpowered for some applications, quite capable for others. Glad to hear the VC6 delivers more (it would be a disappointment otherwise).

[bullen]

Daniel thx for the tip, you're santa!

[Gavinmc42]

Right now the VC6 drivers are a complete mess.

I have found them pretty good, but it does depend on which distribution you are using as they come with different mesa revisions.
I'm using 19.2.4 but newer ones are out.
Anything less than 19.2.0 has some issues.

The VC6 is much better and the 4GB version can do some decent 3D games now.
They have just release a Retro game book that runs well.
There does need to be a 3D game book.

Nice video, more people need to see what the Pi4 can do.
I know nearly nothing about games but when I got this to work, it made my year
https://github.com/Blakkis/GLSL_Python

Code: Select all

#version 300 es

on the Pi4, even works on a Pi3 I think "100 es".
Debugging shader code ? yep not fun.

[bullen]

This is sinking in now.

The pi 4 is the first cheap ES 3 powered "open" ARM device.

The compute module is going to be huge, I predict it will be the most used console by the end of this decade!

We're going into a productive stagflation era again like the 70s when the home computer and the internet was born.

And the CM4 is at the heart of this production.

I'm blown away, thx to the foundation for their hard work!

This thing can run a 3D MMO:

http://talk.binarytask.com/task?id=4064110776042269443
http://talk.binarytask.com/task?id=5085281156123275887

Open-source game engines will flourish, let's go!

[jamesh]

I meant in the realm of 3D games.

Why don't you mention one example while you're at it?

Quake ran well iirc.

The Vc4 has been around for about 8 years. Slagging it off because it's not fast enough for modern games is silly.

The vc6 is better of course, because it has a bigger number.

[bullen]

I'm not "slagging" if off because it's not "fast enough for modern games".

Maybe you should read the whole thread before commenting?

I said it's broken because it can't handle shader based skin mesh animation, that is a fact!

Quake uses new vertex data for every animation frame, that's easy and not good.

But I also just prooved and said it's amazing to be able to build a C+ engine that works on Win/x86 and Lin/ARM with only two rows of difference in the resource files:

Namely version 100 instead of version 120 and precision lowp/mediump/highp float!!!

Unity and Unreal are over!

I also praised your effort and still you're being negative? Atleast read the comment just before your comment please!

[PeterO]

I'm not "slagging" if off because it's not "fast enough for modern games".

Really ? What do you cal this then ?

Right now the VC6 drivers are a complete mess.

Edit: I have given this enough attention for a while, how can you design a GPU that can't even handle the most basic skin mesh animation with 50 bones? No wonder nobody made anything useful for the Raspberry.

[bullen]

That is not unjustified, its not "an insulting and critical attack", I mailed the same thing to Anholt.

But I just googled release dates and OpenGL ES 3.0 was released the same year as the Pi 1 so it makes sense... but still read the whole thread.

What one could say about all of this is the VC4 was long due for an update!

VAO is peak GL; Vulkan is just over-engineered.

[jamesh]

That is not unjustified, its not "an insulting and critical attack", I mailed the same thing to Anholt.

But I just googled release dates and OpenGL ES 3.0 was released the same year as the Pi 1 so it makes sense... but still read the whole thread.

What one could say about all of this is the VC4 was long due for an update!

VAO is peak GL; Vulkan is just over-engineered.

Hmm, I think it is a bit insulting, to the engineers who designed the VC4 - who also, BTW, designed the VC6 which is actually just a souped up VC4 plus some extra bits. The VC4 was specifically designed to implement OpenGLES, to go in to mobile phones. It was never aimed at full OpenGL. It conformed to all the required OpenGLES test suites. And yes, it was due an update. Which it got.

There were a number of games that worked pretty well on the VC4, one of the Need For Speeds IIRC, plus Quake etc.

[bullen]

Ok, yes I'm a bit harsh... but really if you take pride in your work it would not be hard to extrapolate that the best feature of OpenGL 3 released in 2008 (VAO) would have to be ported to OpenGL ES at some point. So the broadcom engineers had 4 years to prevent the VC4 being stuck in the past by predicting that the shaders would require more registers. It's not rocket science. But all good in the end, I'm just so incredibly lucky I didn't try to port my C++ engine in 2017 when I first made it... it would have made me so sad that it didn't work. This summer I bought a Pi 4 to get Java minecraft to run for my son and inadvertently that saved my motivation to keep pushing for a 5 watt MMO!

BTW Minecraft is so bloated it can't run on any ARM SBC. And don't blame Java, it's the lazy programmers that just throw dependency after dependency into the mix, again because of lack of interest! Harsh, but not without reason!

[Daniel Gessel]

the VC6 which is actually just a souped up VC4 plus some extra bits.

From what I understand it has some pretty good extra bits, and the HW engineers did a nice job souping it up to run at twice the clockspeed. Any news on if/when documentation might go public? Or should we all start learning the driver code?

[jamesh]

Ok, yes I'm a bit harsh... but really if you take pride in your work it would not be hard to extrapolate that the best feature of OpenGL 3 released in 2008 (VAO) would have to be ported to OpenGL ES at some point. So the broadcom engineers had 4 years to prevent the VC4 being stuck in the past by predicting that the shaders would require more registers. It's not rocket science.

Have you ANY idea how expensive it is to do this? And how much time it takes? Those engineers (and its a very small team) have been working in the VC5/6 for the last 6 years at least!! The VC5 stuff was ready quite some time ago and was used in some set top box chips IIRC, but then they need to get ported to a Pi capable SoC along with adding the VC6 bits, this all takes many years and many millions of $. It's been done pretty much as fast as was possible within the constraints.

With regard to predicting - that's a bit of a nightmare. Imagine you predict something, make a chip taking that in to account, but then that prediction doesn't happen. You have just lost $5M if not more. Sometimes it better to wait for specification to be a little more solid before a Hail Mary.

[Gavinmc42]

Back in the old days people liked to test their skills by getting the best out of the limited hardware.
Now the hardware is much better but people don't seem as interested in the challenge and only complain?

"Fix the silicon, make it faster and better, we will wait until it is perfect"?
Some extreme views are "it's not perfect therefore I refuse to use it".

We have yet to see the best of the VC4 or VC6.
What tricks could be used?
How does Skin Mesh Animation work any way?

[Daniel Gessel]

We have yet to see the best of the VC4 or VC6.
What tricks could be used?

Fallback to CPU vertex shading should be half decent on Pi3. Don’t know exactly what that would look like in the Mesa stack, but it could use the Pi3 NEON instructions to good effect.