RPi4 - GICv2 - IRQs still show on CPU0 !?!?

[soundcheck]

Could anybody explain to me why all the interrupts are still shown on CPU0?
I had the the understanding that the GIC supposedly offloads the CPU from IRQs.
Same look on 32/64bit kernels (4.19.86-v8+) btw.

Code: Select all

# cat /proc/interrupts
        CPU0       CPU1       CPU2       CPU3
3:       1083       1794       2181         14     GICv2  30 Level     arch_timer
6:          0            0          0          0     GICv2 112 Level     bcm2708_fb DMA
8:        346          0          0          0     GICv2 114 Level     DMA IRQ
16:         42         0          0          0     GICv2  65 Level     fe00b880.mailbox
20:          0          0          0          0     GICv2 169 Level     brcmstb_thermal
21:      11639     0          0          0     GICv2 158 Level     mmc1, mmc0

Or is above just displaying the GIC-400 interrupt controller load?
And CPU0 is not actually handling these IRQs.

I had the understanding that all interrupts are now handled by the GIC controller
and no longer by the core.

enable_gic=0/1 in config.txt wouldn't change anything on the display side.

[trejan]

The interrupt handlers still run on the CPU.