C compiling in AArch64 only use Thumb-2?

[Magniko]

This is not really me asking for guidance, but rather confirmation:

I run my Raspberry Pi 3 B+ with Ubuntu for AArch64. Thus it takes full advantage of the 64-bit architecture.
However, I have tried to compile code with GCC on the Raspberry, and also cross- compilation with an AArch64 extension of GCC on my PC.
When I inspected the executable with objdump, I saw that the instructions were only 32 bit. I compared the code compiled on Ubuntu with the AArch64 -cross compilation, and they were practically identical. I then compared it with code I had earlier compiled on Raspbian and the Raspbian was quite diferent and used the ARMv7 registers and no X or W registers found on ARMv8's AArch64/32 execution modes.

So my question is, does C code always compile to the Thumb-2 instruction set which is 32-bit? Or am I not compiling the code properly?

[jahboater]

So my question is, does C code always compile to the Thumb-2 instruction set which is 32-bit? Or am I not compiling the code properly?

No.
Thumb-2 is a mix of 16-bit and 32-bit wide instructions (with 32-bit address space etc, registers called Rx).
GCC will not generate thumb2 unless you specifically request it with -mthumb (and that will not be possible in AArch64 mode).

On the Pi3/Ubuntu/64-bit what does -march=native -mtune=native emit?
Should be A64 assembler.

[Magniko]

So my question is, does C code always compile to the Thumb-2 instruction set which is 32-bit? Or am I not compiling the code properly?

No.
Thumb-2 is a mix of 16-bit and 32-bit wide instructions (with 32-bit address space etc, registers called Rx).
GCC will not generate thumb2 unless you specifically request it with -mthumb (and that will not be possible in AArch64 mode).

Thanks for the answer.

On the Pi3/Ubuntu/64-bit what does -march=native -mtune=native emit?
Should be A64 assembler.

I tried that with GCC. When doing objdump on the file, it's identical to the other assembly code. Still uses 32-bit instruskjon. I find that strange as all the assembly code I've done with AArch64 be it on Ubuntu, cross-compiled, or after trying your example, uses the AArch64 registers

[LdB]

The 64 bit compiler is very different it won't even accept those flags you are clearly on the 32bit compiler, from memory the documentation tells you it will just ignore them when it doesn't understand them

Install the 64 bit compiler and try again with valid flags like -mcpu=cortex-a53+fp+simd.

You can also pick it at compile time as any aarch64 compiler has a defined macro
__aarch64__ == 1
Just do and #if test on it

Code: Select all

 
#if __aarch64__ == 1
      #pragma message "VALID AARCH64 COMPILER"
#else
      #error  NOT AN AARCH64 COMPILER
#endif

[Magniko]

By 64-bit compiler, are you referring to the one on Ubuntu or the cross-compiler?

You can also pick it at compile time as any aarch64 compiler has a defined macro
__aarch64__ == 1
Just do and #if test on it

I should do this in a shell script with no additional statements than that code? And that will check if GCC can do AArch64 compiling?

[LdB]

Put the #ifdef in any file you are going to compile .. usually first file AKA very top of main.c
The compiler will throw an error if you aren't using an aarch64 compiler

The pre-installed version on ubuntu is up to whoever made the package .. no idea what default is.

I assume you can use the normal linux install commands for whatever GCC version you want

sudo apt-get install gcc-aarch64-linux-gnu
or
sudo apt-get install gcc-aarch64-elf

[Magniko]

Allright will try that
But it’s kinda strange as I did install gcc-aarch64-linux-gnu and used that to compile
I will try again with that method and see if there’s a difference

[Magniko]

Allright, I did the following command:

Code: Select all

aarch64-linux-gnu-gcc test.c -g -o -mcpu=cortex-a53+fp+simd test1

And I get the following error:

unrecognised emulation mode: cpu=aarch64linux

What is the problem then? What flag should I use instead?

[LdB]

You can't just compile like that in short form when doing cross compiling

You are on a PC (Intel Processor) and you are crossing to an ARM processor or Vice Versa.
To go from PC to ARM you also need the arm libraries, to go from ARM to PC you need the Intel libraries.

Read
http://jensd.be/800/linux/cross-compili ... -16-04-lts

The important part to get your head around

Build platform: Architecture of the build machine
Host platform: The architecture you are building for
Target platform: The architecture that will run the binary output of the compilation

[Magniko]

I already had gcc-aarch64-linux-gcc installed. That's what I used for cross compiling.
Either way, I figured out I had to add the -mcpu flag right after aarch64-linux-gnu-gcc. I did that with the flag set to -mcpu=cortex-a53+fp+simd and succesfully compiled an output file. The pragma message also reported positive that AArch64 is compiled. Transferred the output file to a USB, plugged it into my Pi, did Objdump --source.

STILL only using 32-bit instructions, ergo 8-hex
file-command output gives the following

ELF 64-bit LSB shared object, ARM aarch64, version 1 (SYSV), dynamically linked, interpreter /lib/ld-, for GNU/Linux 3.7.0, BuildID[sha1]=f2f9e86d8f4c72a4865b01bb97a95f5fc88e6859, with debug_info, not stripped

[jahboater]

STILL only using 32-bit instructions, ergo 8-hex

What does "8-hex" mean?

All aarch64 instructions are 32-bits wide by the way.

What happens when you do: gcc -S -fverbose-asm xxx.c -o xxx.s
and look at the assembler.
The first line should have a .arch directive followed by details of the compiler.
Is it A64 (x and w registers) or A32 (r registers)

Have you tried the compiler that came with Ubuntu rather than attempting to cross compile?
The default compiler has always worked fine on aarch64 for me.
No hassle, just works out of the box.

[Magniko]

Well this was what I said from the start: the instructions were all 32-bit long(which is 8 hex numbers) despite being compiled for 64-bit architecture which confused me as I assumed the instructions should be 64-bit long.
I also stated that I did see that the assembly showed the use of the AArch64-registers which are X0-30 and not the R1-15 found in ARMv7 assembly and before.
Well now I guess I have gotten a confirmation that it is indeed correct that the instructions are only 32-bit wide for AArch64. Maybe I confused 64-bit registers with 64-bit instructions...

[LdB]

I think I added to the confusion because I misunderstood what you were asking ... so lets call it combined effort