ce4aser
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RPi Zero RAM bus width

Tue Sep 27, 2016 9:04 pm

How bit is RAM on RPi? 8bit, 16bit or 32bit? Example i store char x to RAM. What equal consumed x from ram? Example 8bit AVR is 1B, bool 1B too, int 2x8bit = 2B.

itimpi
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Re: RPi Zero RAM

Tue Sep 27, 2016 9:28 pm

ce4aser wrote:How bit is RAM on RPi? 8bit, 16bit or 32bit? Example i store char x to RAM. What equal consumed x from ram? Example 8bit AVR is 1B, bool 1B too, int 2x8bit = 2B.
that does not have a simple answer as it is dependent on the software environment you are referring to.

Heater
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Re: RPi Zero RAM

Tue Sep 27, 2016 9:35 pm

Same like most other processors today. Memory comes in 8 bit bytes. The CPU may well work with variables that are 8, 16 or 32 bits wide.

If you are working in C/C++ a char is 8 bits. An int is 32 bits.

If you are working in Javascript all numbers are 64 bits!. Characters are some weird unicode format.

No idea what happens in Python.
Memory in C++ is a leaky abstraction .

dan3008
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Re: RPi Zero RAM

Tue Sep 27, 2016 9:39 pm

Heater wrote: No idea what happens in Python.
I dont think anyone does ;) lol

On a serious note. python doesn't handle numbers consistently. However, most the time they are 8bit... but once you've started working with them, they keep changing depending what you've done... For example, the last time I was testing it, 2 was 8 bits, but 1+1 was 16... so goodness only knows what it was playing at
dan3008 wrote:Pays your money, takes your choice

ce4aser
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Re: RPi Zero RAM

Wed Sep 28, 2016 3:33 am

is true this? (RPi Zero)

Psychical adress: 32bit
First set of virtual adress: 16bit (2times adress of psychical), mask first and last bits of psychical adress (aliasing) ...
Second set of virtual adress: 8bit (2times adress of first set of virtual, 4 times adress of psychical adress)

if program can use virtual adress minimal 8 bit if no bit of psychical adress?

W. H. Heydt
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Re: RPi Zero RAM

Wed Sep 28, 2016 3:44 am

Heater wrote:Same like most other processors today. Memory comes in 8 bit bytes. The CPU may well work with variables that are 8, 16 or 32 bits wide.
Not sure about the physical data path to the memory, but the '2837 SoC (Pi3B) has 64-bit modes as well. (And, at a guess, 128-bit double precision.)

W. H. Heydt
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Re: RPi Zero RAM

Wed Sep 28, 2016 3:56 am

ce4aser wrote:is true this? (RPi Zero)

Psychical adress: 32bit
First set of virtual adress: 16bit (2times adress of psychical), mask first and last bits of psychical adress (aliasing) ...
Second set of virtual adress: 8bit (2times adress of first set of virtual, 4 times adress of psychical adress)

if program can use virtual adress minimal 8 bit if no bit of psychical adress?
Are you perhaps referring to physical addresses?

By and large, at the applications programming level, you don't see a difference between virtual memory (and addressing) and physical memory (and addressing). To the program it just looks like one big address space. Likewise, a program isn't going to know how much data is fetched or stored at a time. You issue the instruction and the data appears. You have no idea if the memory controller gets it 1 bit at a time, 1 byte at a time, 1 word at a time, or if it fetches an entire page.

I don't know what the relevant manual for an ARM processor would be, but back when I was doing a lot of IBM S/360 programming, I would have a Principles of Operation manual handy and keep track of processor model and memory fetch size so that I could, in some cases, optimize memory usage by aligning data on boundaries that corresponded to the hardware architecture. Thus the 1 byte fetch on a Model 30, 2 bytes on a model 40, 4 bytes on a model 50. All of them were 32 bit machines, but they varied in how much data they would transfer at a time...and with machines of the speeds we had then, sometimes it mattered. With the Pis...not so much. part of that is the difference between a machine with a 500KHz clock and a machine with a 1.2GHz clock.

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rpdom
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Re: RPi Zero RAM

Wed Sep 28, 2016 4:27 am

At the lowest level, the memory is normally accessed by the ARM CPU in 32 bit words. It also has instructions to use 16 bit half-words or 8 bit bytes.

However, as itimpi said, it depends on the software environment you are using as to how big a char is.

ce4aser
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Re: RPi Zero RAM

Wed Sep 28, 2016 6:21 am

On C lang manual say bool consumed ram as char 8bit, integer 16 bit etc. Variable is as domain web page. Domain to ip. In C variable name to memory adress. So if char consumed only 8bit on 32bit memory and adreess is unique. So 2 variable dont have same adress must exists virtual adress in my logic.

So pychical adress word size 32. So virtual adress with word size 16bit is integer. Merge first 2 virtual adress is first first psychical adress. Mask is done on HW memory. This logic is on virtual adress on 8 bit. Virtual adress on 1bit word not exist becouse have limited count adress. Is true?

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rpdom
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Re: RPi Zero RAM

Wed Sep 28, 2016 6:37 am

Physical memory is address as in byte offsets. First word is at 0x00000000, second word is at 0x00000004 etc. Normally the last two bits of the address are zero, but for Byte operations they can be 0-3.

PiGraham
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Re: RPi Zero RAM

Wed Sep 28, 2016 6:45 am

It depends.

In C/C++ you can use single bits in bitfields so that eight one-bit values can be stored in one byte of RAM. In most cases it is probably better to use an 8-bit bool.

Some info here
http://www.keil.com/support/man/docs/ar ... 870320.htm

Some info on Python here
http://stackoverflow.com/questions/1428 ... field-type

In any language that supports bit-wise logical operations (just about all lanuages) you can use bit masking to work with single bits. It's space efficient but slower and a bit less readable than using bool / Boolean type stored in bytes.

Heater
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Re: RPi Zero RAM

Wed Sep 28, 2016 7:02 am

ce4aser,
On C lang manual say bool consumed ram as char 8bit, integer 16 bit etc.
Be careful with C. The C standard does not exactly specify the sizes of char, int, long. See "Basic Types" here:'

The relation requirements are that the long long is not smaller than long, which is not smaller than int, which is not smaller than short. As char's size is always the minimum supported data type, no other data types (except bit-fields) can be smaller.

The C standard leaves the actual sizes as implementation dependent. For example int is generally 32 bits now a days. It was 16 bit in MSDOS days. An int is still 16 bits on Arduino and such machines.

One does not have memory addressing down to individual bits because the processor and memory system does not support it. At least not in any machine I have ever seen. Every address will contain the smallest unit of storage, generally 8 bit bytes now a days.

This is also why booleans are stored as bytes rather than individual bits.

One might have some bytes stored consecutively in memory, call them A, B, C, D. They might have memory addresses like so:

A at 0xXXXXXXX4
B at 0xXXXXXXX5
C at 0xXXXXXXX6
D at 0xXXXXXXX7

Where "X" is some hex digit.

Or perhaps you have a 32 bit integer variable, V, stored there:

V at 0xXXXXXXX4

Of course both the bytes A, B, C, D and the integer V could be at the same address at the same time!

In which case one could access the byte at 0xXXXXXXX6 as A which would be the third byte of the integer V.

Hmmm....Or is that the second byte of integer V. Depends on what order the bytes of an integer are stored in memory. Some times it's the low byte first, "little endian", sometimes it's the high byte first, "big endian". I will leave it as an exercide for you to find out what endianness the ARM on the Pi is.

I think you are using the word "virtual" incorrectly.

Virtual memory is the mechanism by which a program can use one address range. Say a megabyte starting at 0x00000000 but that data is actually stored in memory in some other location. The processor is mapping the programs "virtual addresses" to the memory systems "physical addresses". The operating system manages how that mapping is done.
Memory in C++ is a leaky abstraction .

jahboater
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Re: RPi Zero RAM

Wed Sep 28, 2016 8:37 am

In C ....
If you are concerned about the precise size of integer variables, use the <stdint.h> header (C99 onwards).
This gives you fixed, known, integer sizes.
For example:

int8_t will be 8 bits signed
int16_t will be 16 bits signed.
uint 32_t will be 32 bits unsigned.
int64_t will be 64 bits signed (regardless of the platform word size)

and so on. There are also macros to ease printing of them (printf formats), for example: PRId64 which portably prints a 64 bit signed integer regardless of whether your platform is 32 or 64 bits.

The "char" type is unsigned on the Pi (unlike x86 where it is signed) because the ARM CPU doesn't directly support 8 bit signed arithmetic, but int8_t and uint8_t will work correctly.

You can use CHAR_BIT to see how wide a normal character is.

I would also use the <stdbool.h> header.

PiGraham
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Re: RPi Zero RAM

Wed Sep 28, 2016 9:23 am

Remember that you can always use C sizeof(x) to find the number of bytes a variable, structure orclass takes up.

Python has sys.getsizeof. A discussion here looks useful.

markatlnk
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Re: RPi Zero RAM bus width

Fri Sep 30, 2016 1:14 pm

If you are asking about the hardware, a quick search of one of the older pi machines indicate it has a Samsung K4P4G324EB memory chip. That is organized as 128M x 32 bit. So the most the processor can get in one cycle is 32 bits of data. It likely has 4 individual write lines, one for each byte, to make byte write operations more efficient.

Mark

ejolson
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Re: RPi Zero RAM bus width

Sat Oct 01, 2016 3:11 am

markatlnk wrote:If you are asking about the hardware, a quick search of one of the older pi machines indicate it has a Samsung K4P4G324EB memory chip. That is organized as 128M x 32 bit. So the most the processor can get in one cycle is 32 bits of data. It likely has 4 individual write lines, one for each byte, to make byte write operations more efficient.
The Intel 8088 microprocessor used in the original IBM PC was a 16-bit processor that talked to RAM through an 8-bit data bus. Is it possible that the 64-bit processor used in the Pi 3 talks to memory through a 32-bit data bus? Note that the width of the data bus determines how fast memory can be accessed; it does not determine how much memory can be accessed. How much memory is determined by the width of the address bus which is known to be 20-bits for the original IBM PC snd 30-bits for the Pi 3. In particular, the 1GB RAM limit of the Pi 3 is a physical property of how many address wires are available on the SOC and nothing to do with the width of the data bus. I wonder how many wires are used for the data bus?

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