I work on a system based on the 80320 (8051 family) microprocessor. I'm thinking of trying to replace the main processor with a modern processor that will have much more memory, USB ports, WiFi, Ethernet, Linux or other real time exec etc. There are a lot of special purpose IO boards that I really have to keep, so what I think I need is a modern processor with a good way of interfacing to these legacy IO boards. The IO is all memory mapped, so I think all I need is a way of reading and writing a byte at a time to/from locations with a 16-bit address. I could obviously do it just by using 16 GPIO pins set to Output for the address bus, plus 8 GPIO pins which are input for read and output for write, plus a couple more pins for ALE and Write Enable. I need to be able to read and write blocks of IO data quite quickly to/from these boards, because some of this stuff is quite time critical. Ideally they would be read and writeable as a block of main memory so I can use the new processor's instruction set to access them. So in this case the requirement is to adapt the 8051 bus to the new processor's bus within an address block. I wonder whether some kind of FPGA would do this well, but I have no idea what's available.
Has anyone done something like this? Any suggestions on how best to go about it, or things to avoid?
Thanks - Rowan