grzegorzn
Posts: 5
Joined: Sat Jul 13, 2013 9:32 pm

Short negative pule while opening UART

Sat Jul 13, 2013 9:59 pm

Hello,
I try to use serial port but I noticed strange behavior. When I open serial port, there is short negative pulse which lasts about 32 microseconds. This pulse is interpreted as a start bit by the other device which causes that garbage byte is received. I tried QSerialPort from Qt framework, native POSIX functions, and bash. Everywhere the problem is the same. Attached oscillogram shows the problem.
NewFile0.gif
oscillogram
NewFile0.gif (4.94 KiB) Viewed 2310 times
First there is 32us pulse, then after about 130 us there are bytes transferred ("a" and LF - 97 and 10). This transmission was generated using bash command:
echo a> /dev/ttyAMA0
The C code I also tried is shown below:

Code: Select all

#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <termios.h>
#include <iostream>
#include <string.h>

#define MODEMDEVICE "/dev/ttyAMA0"
#define BAUDRATE B115200

using namespace std;

int main() {
    int fd = open(MODEMDEVICE, O_RDWR | O_NOCTTY | O_NDELAY);
    if (!fd) {
	cerr << "Cannot open port " << MODEMDEVICE << endl;
	return 1;
    }
    struct termios serialOpt;
    bzero(&serialOpt, sizeof(serialOpt));
    serialOpt.c_cflag = CS8 | CLOCAL | CREAD;
    serialOpt.c_iflag = 0;
    serialOpt.c_oflag = 0;
    serialOpt.c_lflag = 0;
    serialOpt.c_cc[VTIME]    = 0;   /* inter-character timer unused */
    serialOpt.c_cc[VMIN]     = 1;   /* blocking read until 1 character received */
    cfsetispeed(&serialOpt, BAUDRATE);
    cfsetospeed(&serialOpt, BAUDRATE);
    tcflush(fd, TCIFLUSH);
    tcsetattr(fd, TCSANOW, &serialOpt);
    char buf[1];
    buf[0] = 'a'; 
    write(fd, buf, 1);
    close(fd);
    return 0;
}


User avatar
joan
Posts: 14078
Joined: Thu Jul 05, 2012 5:09 pm
Location: UK

Re: Short negative pule while opening UART

Sat Jul 13, 2013 10:16 pm

It is a known fault. It happens when the port is opened. You'll have to find a work around.

grzegorzn
Posts: 5
Joined: Sat Jul 13, 2013 9:32 pm

Re: Short negative pule while opening UART

Sun Jul 14, 2013 1:34 pm

I can find a workaround, but bug like this makes Raspberry Pi an unreliable, immature platform. That's sad.
If this is a known problem, where can I learn more about it? Is it a problem with Linux kernel or BCM2835?

jdb
Raspberry Pi Engineer & Forum Moderator
Raspberry Pi Engineer & Forum Moderator
Posts: 2030
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Re: Short negative pule while opening UART

Sun Jul 14, 2013 3:51 pm

grzegorzn wrote:I can find a workaround, but bug like this makes Raspberry Pi an unreliable, immature platform. That's sad.
If this is a known problem, where can I learn more about it? Is it a problem with Linux kernel or BCM2835?
Sigh.

The platform is _not_ immature and unreliable simply because of a 32uS glitch on the UART0 serial port TXD line when you open the port for access.

The serial peripheral in question is an ARM Primecell PL011 device (a bog standard IP block from ARM - a sort-of 16550A compatible UART) and as such is used in quite a number of other devices. The Linux driver common for all of these will result in the same behaviour.

It's a bug in the mainline driver. Find and fix it, and you too can be considered a Linux contributor!
Rockets are loud.
https://astro-pi.org

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jackokring
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Location: London, UK
Contact: ICQ

Re: Short negative pule while opening UART

Sun Jul 14, 2013 4:02 pm

Any sensible UART use will use a higher level, error tolerant protocol. This bad behavior is not accidental. It simply introduces a start anomaly which could occur for other reasons (power on glitching, power out continuation, etc.), and forces the use of a sensible protocol.
Pi[NFA]=B256R0USB CL4SD8GB Raspbian Stock.
Pi[Work]=A+256 CL4SD8GB Raspbian Stock.
My favourite constant 1.65056745028

grzegorzn
Posts: 5
Joined: Sat Jul 13, 2013 9:32 pm

Re: Short negative pule while opening UART

Sun Jul 14, 2013 5:57 pm

The rule for data transmission is "be generous in what you accept, strict in what you produce". For sure my protocol should be error-tolerant and I can take care of that. But this satisfies only the first part of the rule. What about the second one? Maybe the glitch itself doesn't make Raspberry Pi immature platform, but for sure it's not something acceptable on a mature platform.
Thanks for pointing to PL011, I'm looking into reference manual. I would realy like to make a contribution to Linux kernel. But I already have a kernel module to write and I didn't expect that such basic thing as opening serial port would need my attention.

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jackokring
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Location: London, UK
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Re: Short negative pule while opening UART

Sun Jul 14, 2013 6:12 pm

Likely the driver initializes the TX register, and starts a freeform transmission :D
Pi[NFA]=B256R0USB CL4SD8GB Raspbian Stock.
Pi[Work]=A+256 CL4SD8GB Raspbian Stock.
My favourite constant 1.65056745028

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FTrevorGowen
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Re: Short negative pule while opening UART

Sun Jul 14, 2013 7:32 pm

30 or so years ago I had to find "workarounds" between the connections and communications between various "RS232-like, serially-linked" devices, many (if not most) of which did not implement the full DCE to DTE standard and/or protocols. So I regard the "false start pulse" under discussion as a (very minor) subset of that type of problem. Unless you are limited in the number of wires you can connect with, my solution would be to use one of the Pi's other GPIO ports to generate a RTS handshake signal after the serial port has been opened and said pulse has "passed", thus preventing the receiving device from even "looking for" data transmission from the Pi until the Pi is fully "Ready To Send".
Trev.
Still running Raspbian Jessie on some older Pi's (an A, B1, B2, B+, P2B, 3xP0, P0W) but Stretch on my 2xP3A+, P3B+, P3B, B+, A+ and a B2. See: https://www.cpmspectrepi.uk/raspberry_pi/raspiidx.htm

grzegorzn
Posts: 5
Joined: Sat Jul 13, 2013 9:32 pm

Re: Short negative pule while opening UART

Sun Jul 14, 2013 8:23 pm

The pl011 driver has piece of code with following comment in pl011_startup:
/*
* Provoke TX FIFO interrupt into asserting.
*/
I suppose we need patch similar to this one:
https://lkml.org/lkml/2011/5/16/201
http://patches.linaro.org/1795/

Generating RTS is something I was thinking about too, but I hope fixing the driver won't be very hard.

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