Yes, it's a pain, but actually quite a big ask, requiring major silicon changes, and that sort of thing starts at a good chunk of $1M.
In the grand scheme of things that's not a lot for a company which had a £61 million turnover with £24 million profit ($31m) up to the end of 2017, and has likely only added to that in the last year.jamesh wrote: ↑Tue Apr 02, 2019 12:45 pmYes, it's a pain, but actually quite a big ask, requiring major silicon changes, and that sort of thing starts at a good chunk of $1M.
The Spectre side-channel attacks rely on speculative out-of-order execution of untrusted code.
That's an interesting work-around, but a pretty heavy handed one. My guess: This issue will be pretty much ignored for the Pi 4 and the RPF will choose whatever ARM core (be it A5X or A7X) that fulfills the requirements without breaking the budgets (including transistor and power budgets).ejolson wrote: ↑Tue Apr 02, 2019 2:30 pmThe Spectre side-channel attacks rely on speculative out-of-order execution of untrusted code.
The questions I have are, why haven't we seen this kind of approach being taken for running untrusted code securely in a web browser on an ARM-based desktop? Is this something for the Pi 4?
A big core with features disabled (even if possible) still spends the transistor budget for whatever fabrication process is being used. In particular, an A57 core takes about 5 times as much space on die as an A53 core.spock wrote: ↑Wed Apr 03, 2019 4:36 pmbut why would a big.LITTLE CPU be advantageous for spectre mitigation?
in my understanding out-of-order execution simply could be disabled in a big core and then power consumption also would go down and be comparable to a little core? so better put in 8 big cores and disable out-of-order execution if necessary!
Do the 48 ALU's in the 12 QPU's count as cores?I really doubt that anything more than 4 cores makes any sense.
I wouldn't count them any more than I would count all the various "cores" one find in a modern graphics card from AMD or nVidia.
All your posts are off track in one way or another, no need to state it.Gavinmc42 wrote: ↑Thu Apr 04, 2019 12:52 amDo the 48 ALU's in the 12 QPU's count as cores?I really doubt that anything more than 4 cores makes any sense.
The 2 vector cpu's in the VC4 that control them.
Scaler cpu's as well?
Can an ALU be called a CPU?
Exactly how many ALU's that can be coded do we have?
Will we get more or faster versions of the same?
Er, how many VPU/xQPUs does the VC5 have?
Will the Pi4 get VC4 or VC5 or something else?
Important questions for stuff like OpenCL.
Did that Khronos OpenVX ever get ported to Pi3B+? Whoops off track.
Shucks, thanksAll your posts are off track in one way or another, no need to state it.
Congrats. Well handled. (Plus...I resemble that remark.)Gavinmc42 wrote: ↑Thu Apr 04, 2019 8:10 amShucks, thanksAll your posts are off track in one way or another, no need to state it.
Yep, wife says I ramble and don't get to the point.
Not my fault, you guys make me think and start me going off in tangents.
I blame Eben, all his fault for making the Pi
Since 2012 I have had to learn so much there seems to be leakage.
Plus I'm getting old and forget what I write, lucky Google can find me again.
Nah, miles off.Yammers wrote: ↑Fri Apr 12, 2019 9:25 pmSurgestions for Raspberry Pi 4
What I would like to see as i am intrested in using an SBC for a Nas like the Helios 4 is a Server Bord variation allowing for 4/6 sata ports and transcoding.
Also i think that allowing 10inc displays to be added and nvme or m.2. drives to me added as well.
I would like it to have on off button as standard. I know they want to keep the cost about the xsame but maybe they could for a future model make the single board computerr the size of say a Original Iphone or samsung s8 size, it could then pack a wollop.
He is telling us something, what is he saying
Funny thing about that.... For a while (until WD shut it down), WD Labs made Pi accessories. One of them was a CM carrier board. They actually set the power up sufficiently to handle a CM3, when those came out. The normal purpose of the board was to provide a CM/CM3 with a SATA connection. The packaging, with a plastic frame (original versions of which came with magnets at the corners...very handy) is quite good.