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Re: Compute Module Test Board

Posted: Wed Mar 02, 2016 10:22 am
by hasseb
Hey Ian and Sebastien,

Check this out: http://hasseb.fi/shop2/index.php?route= ... duct_id=57

Schematics and Eagle cad files are available. It is also possible to make modifications to the board.

BR,
Hans

Re: Compute Module Test Board

Posted: Thu Aug 03, 2017 5:25 pm
by brianjaod
I know this thread is old, but I'm desperate to find a compatible vertical style sodimm connector for the CM3. @Briarios could you provide the info on your vertical connector? Or do you possibly have a few samples that I could (at a premium price, if necessary) from you? I've looked the world over and cannot find one anywhere, not even out of Asian distributors. Thanks!

Re: Compute Module Test Board

Posted: Fri Aug 04, 2017 10:13 am
by aBUGSworstnightmare
Alreday answered other tread but here it is again: viewtopic.php?f=98&t=177455&hilit=SODIMM+vertical

Re: Compute Module Test Board

Posted: Fri Aug 04, 2017 7:20 pm
by brianjaod
Thanks for the reply aBUGSworstnightmare!

And thanks to Briarios for the generous sharing of his project BOM which lead me to find that vertical pi module connector from JST (http://www.jst-mfg.com/product/detail_e.php?series=520). Seriously, much appreciated!

Re: Compute Module Test Board

Posted: Thu Oct 12, 2017 2:01 pm
by danergo
Hello, Guys,

First of all, thank you Briarios for this work.

Could you explain a few words, why do you recommend using 4 layer setup in Eagle?
I know that it is possible with 2 layers as well, and I have some experience with 4 layers.

What I don't really get, is how did you planned the layers?
I mean, which layer is designed to what function? What are the function of the inner layers?


Thanks very much!

Re: Compute Module Test Board

Posted: Fri Oct 13, 2017 11:11 am
by Briarios
danergo wrote:
Thu Oct 12, 2017 2:01 pm
Hello, Guys,

First of all, thank you Briarios for this work.

Could you explain a few words, why do you recommend using 4 layer setup in Eagle?
I know that it is possible with 2 layers as well, and I have some experience with 4 layers.

What I don't really get, is how did you planned the layers?
I mean, which layer is designed to what function? What are the function of the inner layers?


Thanks very much!

I used 4 layer PCB because of me seeing the usb and ethernet lines be almost to their exact ohm specs while being relatively thin and not taking up alot of space on the PCB compared to 2 layer, plus the 2 middle layers is ground and ground only so the 2 outer layers are for all the lines.

not sure if this makes sense but i am no engineer and this seemed logical for me to do.

Re: Compute Module Test Board

Posted: Sat Oct 14, 2017 7:54 am
by danergo
Briarios wrote:
Fri Oct 13, 2017 11:11 am
I used 4 layer PCB because of me seeing the usb and ethernet lines be almost to their exact ohm specs while being relatively thin and not taking up alot of space on the PCB compared to 2 layer, plus the 2 middle layers is ground and ground only so the 2 outer layers are for all the lines.

not sure if this makes sense but i am no engineer and this seemed logical for me to do.
Thanks, Briarios.

So to sum up, you have used the layers like the following:

Layer 1 (top): traces for everything
Layer 2 (middle): GND
Layer 3 (middle) GND
Layer 4 (bottom): traces for everything

Right?
So in this case your only benefit with the 4 layers setup (compared to 2 layers) were that you did not need to route GNDs to everywhere?
(and since you saved space, you could route the USB and ETH on the top and bottom layers completely?)
My understanding would be this.

Is that correct?

Thanks very much!

Re: Compute Module Test Board

Posted: Thu Jun 28, 2018 6:51 pm
by ozymandiz
Hi ! thanks so much for sharing this design with the community. Great also to follow the development.

I am going to build on this to add an i2c accelerometer, RTC, and change the board size/mounting holes. Quick questions if you have time please:

does this work for the newer compute module 3 ?

Re: Compute Module Test Board

Posted: Fri Jun 29, 2018 12:50 am
by Briarios
Hello Guys,

for updating to the test board to support the CM3 you will need to change the power chip to the one that is listed on the CMIO schematics on the raspberry pi page

https://www.raspberrypi.org/documentati ... IO_3p0.pdf