The only voltage which is generated on the Compute Module itself is 1.2V (for Core and Memory).
Questions: is this causing the limitation? All other voltages are supplied/generated externally.
EDIT: Just checked table 8 of both data sheets --> exactly the same.
There is no schematic of CM3+ released so far, so impossible to tell from there what is the limiting factor for 1.2GHz max main clock.
Would be glad if somebody from the foundation could share some insights which explains this limitiation.