jeffmakes
Posts: 13
Joined: Fri Mar 19, 2021 7:13 pm

Weird GPIO states coming out of reset

Tue Apr 20, 2021 12:32 am

Hi,

I'm working with the CM4 running the stock Raspberry Pi OS on a custom host board. When the Pi boots, the GPIO pins are not all in tri-state (input / high-impedance). This is not typical for other SBC's, micros, etc., since there's no way for the system controller to know, at reset, what hardware is attached - it can damage hardware or, worse, even be a safety hazard.

In my system the CM4 is hard-wired to a GSM modem module with various control lines, and the initial state of the lines is confusing it.

Unfortunately "gpio readall" doesn't work on the CM4 - it returns "Oops - unable to determine board type... model: 20"

What am I missing?

Cheers,
Jeff

cleverca22
Posts: 3544
Joined: Sat Aug 18, 2012 2:33 pm

Re: Weird GPIO states coming out of reset

Tue Apr 20, 2021 1:22 am

jeffmakes wrote:
Tue Apr 20, 2021 12:32 am
Unfortunately "gpio readall" doesn't work on the CM4 - it returns "Oops - unable to determine board type... model: 20"
i use this as a way to read all gpio, on any model, it doesnt rely on having any special software installed, and just gets the answer right out of the kernel

Code: Select all

root@pi400:~# cat /sys/kernel/debug/pinctrl/*.gpio-pinctrl-bcm2835/pins
registered pins: 54
pin 0 (gpio0) function gpio_in in hi; irq 0 (none)
pin 1 (gpio1) function gpio_in in hi; irq 0 (none)
pin 2 (gpio2) function gpio_in in hi; irq 0 (none)
pin 3 (gpio3) function gpio_in in hi; irq 0 (none)
pin 4 (gpio4) function gpio_in in hi; irq 0 (none)
pin 5 (gpio5) function gpio_in in hi; irq 0 (none)
pin 6 (gpio6) function gpio_in in hi; irq 0 (none)
pin 7 (gpio7) function gpio_in in hi; irq 0 (none)
pin 8 (gpio8) function gpio_in in hi; irq 0 (none)
pin 9 (gpio9) function gpio_in in lo; irq 0 (none)
pin 10 (gpio10) function gpio_in in lo; irq 0 (none)
pin 11 (gpio11) function gpio_in in lo; irq 0 (none)
pin 12 (gpio12) function gpio_in in lo; irq 0 (none)
pin 13 (gpio13) function gpio_in in lo; irq 0 (none)
pin 14 (gpio14) function gpio_in in hi; irq 0 (none)
pin 15 (gpio15) function gpio_in in hi; irq 0 (none)
pin 16 (gpio16) function gpio_in in lo; irq 0 (none)
pin 17 (gpio17) function gpio_in in lo; irq 0 (none)
pin 18 (gpio18) function gpio_in in hi; irq 0 (none)
pin 19 (gpio19) function gpio_in in lo; irq 0 (none)
pin 20 (gpio20) function gpio_in in lo; irq 0 (none)
pin 21 (gpio21) function gpio_in in hi; irq 0 (none)
pin 22 (gpio22) function gpio_in in lo; irq 0 (none)
pin 23 (gpio23) function gpio_in in lo; irq 0 (none)
pin 24 (gpio24) function gpio_in in lo; irq 0 (none)
pin 25 (gpio25) function gpio_in in lo; irq 0 (none)
pin 26 (gpio26) function gpio_in in hi; irq 0 (none)
pin 27 (gpio27) function gpio_in in hi; irq 0 (none)
pin 28 (gpio28) function alt5 in hi; irq 0 (none)
pin 29 (gpio29) function alt5 in lo; irq 0 (none)
pin 30 (gpio30) function alt3 in lo; irq 0 (none)
pin 31 (gpio31) function alt3 in lo; irq 0 (none)
pin 32 (gpio32) function alt3 in hi; irq 0 (none)
pin 33 (gpio33) function alt3 in hi; irq 0 (none)
pin 34 (gpio34) function alt3 in lo; irq 0 (none)
pin 35 (gpio35) function alt3 in hi; irq 0 (none)
pin 36 (gpio36) function alt3 in hi; irq 0 (none)
pin 37 (gpio37) function alt3 in hi; irq 0 (none)
pin 38 (gpio38) function alt3 in hi; irq 0 (none)
pin 39 (gpio39) function alt3 in hi; irq 0 (none)
pin 40 (gpio40) function alt0 in lo; irq 0 (none)
pin 41 (gpio41) function gpio_in in hi; irq 0 (none)
pin 42 (gpio42) function gpio_out in hi; irq 0 (none)
pin 43 (gpio43) function gpio_in in hi; irq 0 (none)
pin 44 (gpio44) function gpio_in in hi; irq 0 (none)
pin 45 (gpio45) function alt0 in lo; irq 0 (none)
pin 46 (gpio46) function gpio_in in lo; irq 0 (none)
pin 47 (gpio47) function gpio_in in lo; irq 0 (none)
pin 48 (gpio48) function gpio_in in lo; irq 0 (none)
pin 49 (gpio49) function gpio_in in lo; irq 0 (none)
pin 50 (gpio50) function gpio_in in lo; irq 0 (none)
pin 51 (gpio51) function gpio_in in lo; irq 0 (none)
pin 52 (gpio52) function gpio_in in lo; irq 0 (none)
pin 53 (gpio53) function gpio_in in lo; irq 0 (none)
there are ~6 different stages that could be impacting the state of the gpio pins
  1. the hardware reset
  2. the boot rom in the SoC
  3. the firmware on the SPI flash and its bootconf.txt file
  4. the firmware on the eMMC/SD and its config.txt file
  5. linux and the device-tree config passed in from the previous stage and config.txt
  6. any apps your running on bootup
i think the first step to debugging, is to paste the contents of that pins file, and say which pins are in a wrong state

aBUGSworstnightmare
Posts: 2786
Joined: Tue Jun 30, 2015 1:35 pm

Re: Weird GPIO states coming out of reset

Tue Apr 20, 2021 5:09 am

@jeffmakes: how do you configure your GPIOs in use? Do you do it
- via config.txt?
- custom dt-blob.bin?
- driver?

wiringPi is no longer supported - use raspi-gpio, pigpio or a libgpiod library depending on the application.

Code: Select all

sudo raspi-gpio get 
part of a stock OS

User avatar
Milliways
Posts: 686
Joined: Fri Apr 25, 2014 12:18 am
Location: Sydney, Australia

Re: Weird GPIO states coming out of reset

Tue Apr 20, 2021 6:44 am

jeffmakes wrote:
Tue Apr 20, 2021 12:32 am
Hi,

I'm working with the CM4 running the stock Raspberry Pi OS on a custom host board. When the Pi boots, the GPIO pins are not all in tri-state (input / high-impedance). This is not typical for other SBC's, micros, etc., since there's no way for the system controller to know, at reset, what hardware is attached - it can damage hardware or, worse, even be a safety hazard.

In my system the CM4 is hard-wired to a GSM modem module with various control lines, and the initial state of the lines is confusing it.

Unfortunately "gpio readall" doesn't work on the CM4 - it returns "Oops - unable to determine board type... model: 20"

What am I missing?

Cheers,
Jeff
The SOC boots with all pins as INPUT with either pullup (pins 0-7) or pulldown (as per the datasheet).
Device Tree can be used to reconfigure shortly after boot.

Incidentally on Raspberry Pi OS you can use the the raspi-gpio debug tool to examine pins.

I have written a python program to display in a similar format to "gpio readall".
https://github.com/Milliways2/GPIOreadall

6by9
Raspberry Pi Engineer & Forum Moderator
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Re: Weird GPIO states coming out of reset

Tue Apr 20, 2021 7:26 am

Milliways wrote:
Tue Apr 20, 2021 6:44 am
The SOC boots with all pins as INPUT with either pullup (pins 0-7) or pulldown (as per the datasheet).
Device Tree can be used to reconfigure shortly after boot.
Exactly this.
The default pull up/down state is documented in section 6.2 of the datasheet.
Choose appropriate GPIOs for the default pulls required by your attached hardware.
Software Engineer at Raspberry Pi Trading. Views expressed are still personal views.
I'm not interested in doing contracts for bespoke functionality - please don't ask.

jeffmakes
Posts: 13
Joined: Fri Mar 19, 2021 7:13 pm

Re: Weird GPIO states coming out of reset

Fri Apr 23, 2021 5:14 pm

Thanks very much, everyone.

That's unusual - I've never seen a chip that has its pins pulled in a fixed direction on boot. Normally they're tristated. I guess it's just to save power for users who can't be bothered to handle their unused inputs.

It's a bit inconvenient since it applies another constraint to one's hardware design. I'm really tight for IO already!

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rpdom
Posts: 18516
Joined: Sun May 06, 2012 5:17 am
Location: Chelmsford, Essex, UK

Re: Weird GPIO states coming out of reset

Fri Apr 23, 2021 5:36 pm

Just add external pulls in the direction you want. The internal ones are in the order of 50K, so a 10K or lower externally with over ride that.
Unreadable squiggle

jeffmakes
Posts: 13
Joined: Fri Mar 19, 2021 7:13 pm

Re: Weird GPIO states coming out of reset

Fri Apr 23, 2021 11:09 pm

Thanks rpdom. That was going to be my next question since it's undocumented in the SoC datasheet!

dp11
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Posts: 475
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Re: Weird GPIO states coming out of reset

Sat Apr 24, 2021 4:44 am

It's documented in the CM4 Datasheet page 13.

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