Posts: 3
Joined: Thu May 03, 2018 12:09 pm

Capabilities of the SPI1 interface

Thu May 03, 2018 12:46 pm

Hi all,

I'm a complete beginner with the Pi trying to use it for testing another board. My problem is that I really need to do 16-bit SPI transfers and SPI0 is limited to 8/9 bit transfers. I'm bit-bashing the interface at the moment just to get started but while that's OK for transmitting as a master, it isn't going to keep up with an external clock when I try to emulate a slave.

Looking through the forums, previous questions on this have indicated that only 8/9 bits are supported. I've seen it said that there are actually 3 SPI interfaces in the device "of which only one is brought out" which I guess is SPI0 (with its two CE pins). However, I also note some posts discussing using SPI1 (which has its own CE pins).

The datasheet discusses two SPI devices capable of large word transfers in section 2.3 on page 20 and the third SPI which supports LoSSI in section 10 on page 148 of the datasheet: ... herals.pdf

Assuming SPI0 is the one in section 10, is "SPI1" one of the interfaces described in section 2.3 which is capable of larger word transfers?

Finally, I just noticed that on page 153 of the datasheet, there is this description of bit 25:
Enable Long data word in Lossi mode if
DMA_LEN is set
0= writing to the FIFO will write a single byte
1= wrirng to the FIFO will write a 32 bit word
I could pad 16-bit transfers to 32 easily enough if it can work in that mode.

Can someone please give me a clue or point me at something that explains this in more detail.


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