Does anyone know if the V3D block is connected to the L2 cache? The V3D itself has its own L2 caches so it's conceivable it's not.
I've peeked at the V3D registers whilst an OpenGL program is running and the control lists are placed at the 'direct uncached' 0xc0000000 area. Looking at the control list it constructs (I've written a program that can disassemble them) the various other address are also within the 'direct uncached' area.
Andrew Holme's hello_fft allocates within the 'l2 cached (non-allocating)' 0x40000000 area. Which I believe means writes to the area will go straight through the cache if the data is not in the cache (though I'm not sure if you can see this behaviour from ARM side).
So this lends some evidence to the no L2 cache theory.
With my little test program I've successfully run a V3D control list when I've allocated memory from any of the 4 possible areas (allocated via the VC mailbox interface with the appropriate address used in the control lists and given to the V3D registers in each case).