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DMA burst length when reading from registers

Posted: Thu Jul 24, 2014 11:53 pm
by colinh

I'm playing with DMA transfers, including reading from the (memory mapped) registers, such as the system timer's CLO.

Unfortunately, I'm on holiday, which entails limited access to a flat screen TV and miserable internet connectivity. But, worst of all, my JTAG interface seems to have broken, so I'm reduced to card swapping :( Holidays! Honestly! Beaches. Bright sun, sand, sea water and no WLAN. What's the point?

Anyway, that's just to excuse my laziness...

So, what exactly is burst length? The number of words that the DMA tries to process "in one go"? I understand the width parameter (ie 32 bits or 128 bits at once), but how do bursts work? In particular when accessing a register, ie. where you can only read the single word over and over (ie. one word at a time).

Is it a question of filling a DMA buffer before the burst (transfer) is initiated?