phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 8:44 pm

Hello

I try to produce a PWM on a RPI zero pin.. it's a bare metal c code

I try to have a pulse on pin 13, I tried many different codes, none of them work

while I can use GPIO's, SPI and UART without problem so the bootloader works

I also tried to put the card directly on the sd card

I tried the sd card in another SPI zero, same problem

Code: Select all

#define BCM2835_BASE 0x20000000

#define GPIO_BASE ( BCM2835_BASE + 0x200000 )
#define GPIO_CLOCK_BASE ( BCM2835_BASE + 0x101000 )
#define PWM_BASE ( BCM2835_BASE + 0x20C000 )
#define SYSTIMER_BASE ( BCM2835_BASE + 0x3000 )

#define GPIO_CLOCK_PWM_OFFSET (40 * 4)
#define GPIO_CLOCK_PWD (0x5A << 24)

#define CM_CTL_MASH_1 ( 1 << 9 )
#define CM_CTL_BUSY ( 1 << 7 )
#define CM_CTL_KILL ( 1 << 5 )
#define CM_CTL_ENAB ( 1 << 4 )
#define CM_CTL_SRC_OSCI ( 1 << 0 )

#define CM_DIV_DIVI_SHIFT   12
#define CM_DIV_DIVF_SHIFT   0

#define GPIO_GPFSEL1 4

#define PWM_CTL_SBIT1 ( 1 << 3 )
#define PWM_CTL_PWEN1 ( 1 << 0 )

#define PWM_STA_STA1 ( 1 << 9 )
#define PWM_STA_BERR ( 1 << 8 )
#define PWM_STA_GAPO1 ( 1 << 4 )

#define PWM_BUFFER_SIZE 2048

typedef struct {
     volatile unsigned int ctl;    // 0x00
     volatile unsigned int sta;    // 0x04
     volatile unsigned int dmac;    // 0x08
     volatile unsigned int unused1;  // 0x0c
     volatile unsigned int rng1;    // 0x10
     volatile unsigned int dat1;    // 0x14
     volatile unsigned int fif1;    // 0x18
     volatile unsigned int unused2;  // 0x1c
     volatile unsigned int rng2;    // 0x20
     volatile unsigned int dat2;    // 0x24
} Pwm_registers;

volatile unsigned int* gpio = (unsigned int*)GPIO_BASE;

typedef struct {
     volatile unsigned int control_status;
     volatile unsigned int counter_lo;
     volatile unsigned int counter_hi;
     volatile unsigned int compare0;
     volatile unsigned int compare1;
     volatile unsigned int compare2;
     volatile unsigned int compare3;
} Systimer_t;

Systimer_t* systemTimer = (Systimer_t *)SYSTIMER_BASE;

typedef struct {
     volatile unsigned int ctl;
     volatile unsigned int div;
}Clock_manager;

int notmain ( void )
{
  volatile Pwm_registers* sysPwm = (Pwm_registers *) PWM_BASE;

  volatile Clock_manager* sysClockManager = (Clock_manager *) (GPIO_CLOCK_BASE + GPIO_CLOCK_PWM_OFFSET);

  // ALT0 on pin 13
  gpio[GPIO_GPFSEL1] |= (1 << (9+2));
  gpio[GPIO_GPFSEL1] &= ~(1 << (9+1));
  gpio[GPIO_GPFSEL1] &= ~(1 << (9+0));

  // maximum frequency 37.5K, 256 resolution
  sysClockManager->ctl = GPIO_CLOCK_PWD | CM_CTL_KILL;
  while ( sysClockManager->ctl & CM_CTL_BUSY);
  // clock i = 2 f = 0
  sysClockManager->div = GPIO_CLOCK_PWD | (2 << CM_DIV_DIVI_SHIFT) | (0 << CM_DIV_DIVF_SHIFT);
  sysClockManager->ctl = GPIO_CLOCK_PWD | CM_CTL_MASH_1 | CM_CTL_SRC_OSCI | CM_CTL_ENAB;

  sysPwm->ctl = 0;
  sysPwm->rng1 = 256;
  sysPwm->dat1 = 128;
  sysPwm->ctl |= PWM_CTL_PWEN1;

  while(1)
  {

  };

  return(0);
}
sorry I don't have anymore to add to this question, but it's the main (and only) code that should be running on the pi

Any bare-metal guru that can help me on this one?

thanks for your help

Phil
Last edited by phil123456 on Fri Jul 10, 2020 9:56 pm, edited 1 time in total.

cleverca22
Posts: 581
Joined: Sat Aug 18, 2012 2:33 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 9:21 pm

none of your MMIO has the volatile keyword, so the compiler is possibly deleting large chunks of code

you need to flag things properly as volatile, and read the generated ASM to confirm its doing it right

phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 9:42 pm

cleverca22 wrote:
Fri Jul 10, 2020 9:21 pm
none of your MMIO has the volatile keyword, so the compiler is possibly deleting large chunks of code

you need to flag things properly as volatile, and read the generated ASM to confirm its doing it right
ok I did'nt know it was important
even with the volatile keyword it did not work

why would the compiler remove actual code ?
what is volatile ? I usualy do C++/java/.NET

phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 9:56 pm

cleverca22 wrote:
Fri Jul 10, 2020 9:21 pm
none of your MMIO has the volatile keyword, so the compiler is possibly deleting large chunks of code

you need to flag things properly as volatile, and read the generated ASM to confirm its doing it right
I updated the code and my question
yet it's not working, nothing appears on pin 13

I must be missing something

cleverca22
Posts: 581
Joined: Sat Aug 18, 2012 2:33 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 10:16 pm

without volatile, the compiler is free to switch the order of writes to ram, and it may just skip writes entirely, because you never read the variable again, so the write doesnt matter

what does the generated asm look like? run `objdump -D` on the compiled elf file

phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 10:32 pm

Code: Select all

phil@rt-linux-pi:~/test$ arm-none-eabi-objdump -D notmain.o

notmain.o:     file format elf32-littlearm


Disassembly of section .text:

00000000 <notmain>:
   0: e59f007c ldr r0, [pc, #124] ; 84 <notmain+0x84>
   4: e1a01000 mov r1, r0
   8: e59f3078 ldr r3, [pc, #120] ; 88 <notmain+0x88>
   c: e5933000 ldr r3, [r3]
  10: e5932010 ldr r2, [r3, #16]
  14: e3822b02 orr r2, r2, #2048 ; 0x800
  18: e52de004 push {lr} ; (str lr, [sp, #-4]!)
  1c: e5832010 str r2, [r3, #16]
  20: e5932010 ldr r2, [r3, #16]
  24: e3c22b01 bic r2, r2, #1024 ; 0x400
  28: e5832010 str r2, [r3, #16]
  2c: e5932010 ldr r2, [r3, #16]
  30: e59fc054 ldr ip, [pc, #84] ; 8c <notmain+0x8c>
  34: e3c22c02 bic r2, r2, #512 ; 0x200
  38: e5832010 str r2, [r3, #16]
  3c: e580c0a0 str ip, [r0, #160] ; 0xa0
  40: e59130a0 ldr r3, [r1, #160] ; 0xa0
  44: e2132080 ands r2, r3, #128 ; 0x80
  48: 1afffffc bne 40 <notmain+0x40>
  4c: e3a0cc01 mov ip, #256 ; 0x100
  50: e3a00080 mov r0, #128 ; 0x80
  54: e59f3034 ldr r3, [pc, #52] ; 90 <notmain+0x90>
  58: e59fe034 ldr lr, [pc, #52] ; 94 <notmain+0x94>
  5c: e58130a4 str r3, [r1, #164] ; 0xa4
  60: e59f3030 ldr r3, [pc, #48] ; 98 <notmain+0x98>
  64: e581e0a0 str lr, [r1, #160] ; 0xa0
  68: e5832000 str r2, [r3]
  6c: e583c010 str ip, [r3, #16]
  70: e5830014 str r0, [r3, #20]
  74: e5932000 ldr r2, [r3]
  78: e3822001 orr r2, r2, #1
  7c: e5832000 str r2, [r3]
  80: eafffffe b 80 <notmain+0x80>
  84: 20101000 andscs r1, r0, r0
  88: 00000000 andeq r0, r0, r0
  8c: 5a000020 bpl 114 <systemTimer+0x110>
  90: 5a002000 bpl 8098 <systemTimer+0x8094>
  94: 5a000211 bpl 8e0 <systemTimer+0x8dc>
  98: 2020c000 eorcs ip, r0, r0

Disassembly of section .data:

00000000 <gpio>:
   0: 20200000 eorcs r0, r0, r0

00000004 <systemTimer>:
   4: 20003000 andcs r3, r0, r0

Disassembly of section .comment:

00000000 <.comment>:
   0: 43434700 movtmi r4, #14080 ; 0x3700
   4: 3128203a ; <UNDEFINED> instruction: 0x3128203a
   8: 2d393a35 vldmdbcs r9!, {s6-s58}
   c: 39313032 ldmdbcc r1!, {r1, r4, r5, ip, sp}
  10: 2d34712d ldfcss f7, [r4, #-180]! ; 0xffffff4c
  14: 75627530 strbvc r7, [r2, #-1328]! ; 0xfffffad0
  18: 3175746e cmncc r5, lr, ror #8
  1c: 2e392029 cdpcs 0, 3, cr2, cr9, cr9, {1}
  20: 20312e32 eorscs r2, r1, r2, lsr lr
  24: 39313032 ldmdbcc r1!, {r1, r4, r5, ip, sp}
  28: 35323031 ldrcc r3, [r2, #-49]! ; 0xffffffcf
  2c: 65722820 ldrbvs r2, [r2, #-2080]! ; 0xfffff7e0
  30: 7361656c cmnvc r1, #108, 10 ; 0x1b000000
  34: 5b202965 blpl 80a5d0 <systemTimer+0x80a5cc>
  38: 2f4d5241 svccs 0x004d5241
  3c: 2d6d7261 sfmcs f7, 2, [sp, #-388]! ; 0xfffffe7c
  40: 72622d39 rsbvc r2, r2, #3648 ; 0xe40
  44: 68636e61 stmdavs r3!, {r0, r5, r6, r9, sl, fp, sp, lr}^
  48: 76657220 strbtvc r7, [r5], -r0, lsr #4
  4c: 6f697369 svcvs 0x00697369
  50: 3732206e ldrcc r2, [r2, -lr, rrx]!
  54: 39393537 ldmdbcc r9!, {r0, r1, r2, r4, r5, r8, sl, ip, sp}
  58: Address 0x0000000000000058 is out of bounds.


Disassembly of section .ARM.attributes:

00000000 <.ARM.attributes>:
   0: 00002941 andeq r2, r0, r1, asr #18
   4: 61656100 cmnvs r5, r0, lsl #2
   8: 01006962 tsteq r0, r2, ror #18
   c: 0000001f andeq r0, r0, pc, lsl r0
  10: 00543405 subseq r3, r4, r5, lsl #8
  14: 01080206 tsteq r8, r6, lsl #4
  18: 04120109 ldreq r0, [r2], #-265 ; 0xfffffef7
  1c: 01150114 tsteq r5, r4, lsl r1
  20: 01180317 tsteq r8, r7, lsl r3
  24: 011a0119 tsteq sl, r9, lsl r1
  28: Address 0x0000000000000028 is out of bounds.


Last edited by phil123456 on Fri Jul 10, 2020 10:37 pm, edited 1 time in total.

cleverca22
Posts: 581
Joined: Sat Aug 18, 2012 2:33 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 10:34 pm

you need to use the arm objdump

phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 10:37 pm

cleverca22 wrote:
Fri Jul 10, 2020 10:34 pm
you need to use the arm objdump
I updated my answer

cleverca22
Posts: 581
Joined: Sat Aug 18, 2012 2:33 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 10:47 pm

and you must run it on the final .elf file, not the .o file
the .o doesnt have the addressed filled in by the linker, so its nearly impossible to see what address its writing things to

phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 11:00 pm

sorry I am quiet new to this
the dump is huge

https://pastebin.com/HmnLcdWY

it also contains additional temporarily unused c files, I commented everything leaving only my pwm test part

btw here is the makefile

Code: Select all



ARMGNU ?= arm-none-eabi
#ARMGNU ?= arm-linux-gnueabi

AOPS = --warn --fatal-warnings
COPS = -Wall -Werror -O2 -nostdlib -nostartfiles -ffreestanding

all : kernel.img

clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.srec
rm -f *.elf
rm -f *.list
rm -f *.img

vectors.o : vectors.s
$(ARMGNU)-as $(AOPS) vectors.s -o vectors.o

tools.o : tools.c
$(ARMGNU)-gcc $(COPS) -c tools.c -o tools.o

uart.o : uart.c
$(ARMGNU)-gcc $(COPS) -c uart.c -o uart.o

notmain.o : notmain.c
$(ARMGNU)-gcc $(COPS) -c notmain.c -o notmain.o

notmain.elf : memmap vectors.o notmain.o tools.o uart.o
$(ARMGNU)-ld vectors.o notmain.o tools.o uart.o -T memmap -o notmain.elf
$(ARMGNU)-objdump -D notmain.elf > notmain.list

kernel.img : notmain.elf
$(ARMGNU)-objcopy --srec-forceS3 notmain.elf -O srec notmain.srec
$(ARMGNU)-objcopy notmain.elf -O binary kernel.img

cleverca22
Posts: 581
Joined: Sat Aug 18, 2012 2:33 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 11:10 pm

Code: Select all

0000803c <notmain>:
    803c: e59f007c ldr r0, [pc, #124] ; 80c0 <notmain+0x84>
    8040: e1a01000 mov r1, r0
    8044: e59f3078 ldr r3, [pc, #120] ; 80c4 <notmain+0x88>
this will load the 0x000086cc from addr 80c4 into r3

Code: Select all

000086cc <gpio>:
    86cc: 20200000 eorcs r0, r0, r0
which is the `volatile unsigned int* gpio = (unsigned int*)GPIO_BASE;` in the c code
because you didnt compile with `-g`, the debug info is lost, and objdump is trying to decode every single number as instructions, but its still readable

Code: Select all

    8048: e5933000 ldr r3, [r3]
it then reads that address from ram, so now r3 contains 0x20200000

Code: Select all

    804c: e5932010 ldr r2, [r3, #16]
    8050: e3822b02 orr r2, r2, #2048 ; 0x800
    8054: e52de004 push {lr} ; (str lr, [sp, #-4]!)
    8058: e5832010 str r2, [r3, #16]
    805c: e5932010 ldr r2, [r3, #16]
    8060: e3c22b01 bic r2, r2, #1024 ; 0x400
    8064: e5832010 str r2, [r3, #16]
    8068: e5932010 ldr r2, [r3, #16]
then it loads r3 + 16 into r2, and does some bit manipulation, that would be your GPIO_GPFSEL1 code
but GPIO_GPFSEL1 is at r3 + 4 ....

Code: Select all

#define GPIO_GPFSEL1 4
  gpio[GPIO_GPFSEL1] |= (1 << (9+2));
this isnt accessing the register at addr+4, its accessing the reg at addr+(4*4), because gpio is an array of 32bit ints, and the 4th one begins at +16
but FSEL1 is at +4, gpio[1] not gpio[4]

and since your not setting the altfunc correctly, nothing you do with PWM will ever affect pin 13

edit:

https://github.com/librerpi/rpi-open-fi ... .cc#L3-L10

Code: Select all

void BCM2708Gpio::setFunction(uint8_t pin_num, BCM2708PinmuxSetting function) {
  volatile uint32_t* fsel = reinterpret_cast<volatile uint32_t*>(&GP_FSEL0);
  uint8_t regnum = pin_num / 10;

  uint8_t pin_shift = (pin_num % 10) * 3;

  fsel[regnum] = (fsel[regnum] & ~(0x7 << pin_shift)) | (function << pin_shift);
}
this is how ive been managing alt functions

phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 11:25 pm

yeah I quiet don't get this, sometimes codes I stumble upon do *4, sometimes not,

I'll have look, thanks for clearing the path
I hope I'll make this work...dude you're a god in this, I am so impressed

I'll repost it ; beeing built with -g option

phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 11:31 pm

I added -g at the end of the Makefile COPS variable, but it did not add any debug info
maybe I am doing something wrong

cleverca22
Posts: 581
Joined: Sat Aug 18, 2012 2:33 pm

Re: RPI Zero - Bare metal - PWM

Fri Jul 10, 2020 11:59 pm

phil123456 wrote:
Fri Jul 10, 2020 11:31 pm
I added -g at the end of the Makefile COPS variable, but it did not add any debug info
maybe I am doing something wrong
i believe ld also has to be called with -g

and make wont rebuild if you only change the Makefile, so you need to clean first to notice the difference with `objdump -D`

the *4 and /4 thats going on, is because you keep switching between using an array to access gpio, and using raw addresses, you need to pick one way of doing things and stick to it

Code: Select all

#define VC4_PERIPH_BASE 0x7E000000
#define ARM_PERIPH_BASE 0x20000000

#define VC4_TO_ARM_PERIPH(addr) ((addr - VC4_PERIPH_BASE) + ARM_PERIPH_BASE)

#if defined(__arm__) | defined(__aarch64__)
#  ifdef BAREMETAL
#    define HW_REGISTER_RW(addr) (*(volatile uint32_t *)(VC4_TO_ARM_PERIPH(addr)))
#    define HW_REGISTER_RO(addr) (*(const volatile uint32_t *)(VC4_TO_ARM_PERIPH(addr)))
#  else
#    define HW_REGISTER_RW(addr) (*(volatile uint32_t *)(mmiobase + (addr & 0x00ffffff)))
#  endif
#else
#define HW_REGISTER_RW(addr) (*(volatile uint32_t *)(addr))
#define HW_REGISTER_RO(addr) (*(const volatile uint32_t *)(addr))
#endif
#define GP_FSEL1                                                 HW_REGISTER_RW( 0x7e200004 ) 
ive been using code like this (originally found in the upstream rpi-open-firmware) for all of my register access

this code will cast the address into a pointer to an int, then dereference it, so you can just `GP_FSEL1 = something;` to set and `something = GP_FSEL1` to read, or even `GP_FSEL1 &= ~something` to clear bits like normal

the `#ifdef BAREMETAL` part also allows this code to work identically even under normal linux, it just expects mmiobase to be a pointer made by mmap'ing /dev/mem

you can find all of the headers i'm using under https://github.com/librerpi/rpi-open-fi ... ter/common

phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

Re: RPI Zero - Bare metal - PWM

Sat Jul 11, 2020 5:18 pm

cleverca22 wrote:
Fri Jul 10, 2020 11:10 pm

Code: Select all

this isnt accessing the register at addr+4, its accessing the reg at addr+(4*4)
I changed the constant to 1 instead of 4 but I still dont get any PWM

phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

Re: RPI Zero - Bare metal - PWM

Sat Jul 11, 2020 5:23 pm

cleverca22 wrote:
Fri Jul 10, 2020 11:59 pm
the *4 and /4 thats going on, is because you keep switching between using an array to access gpio, and using raw addresses, you need to pick one way of doing things and stick to it
I meant that some codes do that some others dont, I just copy paste sometimes checking values in the datasheet to figure things out

I tried to compile the bcm2835 library, I had tons of errors, so I picked up only the functions I needed and it's defined constants

no PWM could be output on pin 13, although I managed to do it with linux flawlessly with the exact same code

if only the datasheet were more explanatory, I mean with working/tested examples
Last edited by phil123456 on Sat Jul 11, 2020 5:31 pm, edited 1 time in total.

cleverca22
Posts: 581
Joined: Sat Aug 18, 2012 2:33 pm

Re: RPI Zero - Bare metal - PWM

Sat Jul 11, 2020 5:25 pm

phil123456 wrote:
Sat Jul 11, 2020 5:18 pm
cleverca22 wrote:
Fri Jul 10, 2020 11:10 pm

Code: Select all

this isnt accessing the register at addr+4, its accessing the reg at addr+(4*4)
I changed the constant to 1 instead of 4 but I still dont get any PWM
there are likely other such mistakes in the code, i didnt read all of the asm

try reading each line of the asm, and try to match it up to the c code as you go, and see if things look right

phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

Re: RPI Zero - Bare metal - PWM

Sat Jul 11, 2020 5:32 pm

I tried but the asm does not even match values from the code

does anyone have a simple bare metal c working example ?

I dont understand why I can make the SPI and UART work but not the SPI

cleverca22
Posts: 581
Joined: Sat Aug 18, 2012 2:33 pm

Re: RPI Zero - Bare metal - PWM

Sat Jul 11, 2020 5:35 pm

if you both compile (gcc) and link (ld) with -g, and then objdump -D, does the output change any?

phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

Re: RPI Zero - Bare metal - PWM

Sat Jul 11, 2020 6:17 pm

no, same thing

meanwhile, to be sure I was scoping the right pin I flipflopped pin 13 and it works

I also rewrote my own bare metal of the bcm2835 library (just keeping pwm stuffs)

same problem, no output

Code: Select all

    bcm2835_init();

    bcm2835_gpio_fsel(18,BCM2835_GPIO_FSEL_ALT5 ); //PWM0 signal on GPIO18
    bcm2835_gpio_fsel(13,BCM2835_GPIO_FSEL_ALT0 ); //PWM1 signal on GPIO13
    bcm2835_pwm_set_clock(2);       // Max clk frequency (19.2MHz/2 = 9.6MHz)
    bcm2835_pwm_set_mode(0, 1 , 1);  //channel 0, markspace mode, PWM enabled.
    bcm2835_pwm_set_range(0,64);    //channel 0, 64 is max range (6bits): 9.6MHz/64=150KHz switching PWM freq.
    bcm2835_pwm_set_mode(1, 1, 1);  //channel 1, markspace mode, PWM enabled.
    bcm2835_pwm_set_range(1,64);    //channel 0, 64 is max range (6bits): 9.6MHz/64=150KHz switching PWM freq.

    bcm2835_pwm_set_data(0, 128);
    bcm2835_pwm_set_data(1, 128);
 
I just dont get it
this should work, it does under linux...

cleverca22
Posts: 581
Joined: Sat Aug 18, 2012 2:33 pm

Re: RPI Zero - Bare metal - PWM

Sat Jul 11, 2020 6:35 pm

try reading over the code under https://godbolt.org/z/oTxW5W and it may make more sense

edit:

Code: Select all

sysClockManager->ctl = GPIO_CLOCK_PWD | CM_CTL_MASH_1 | CM_CTL_SRC_OSCI | CM_CTL_ENAB;
the docs say you must not set the enable bit at the same time as changing other params
you must change the params, then set enable in a second write

the rest of the code looks good at a quick glance

phil123456
Posts: 39
Joined: Fri Jun 26, 2020 5:29 pm

Re: RPI Zero - Bare metal - PWM

Sat Jul 11, 2020 7:00 pm

the code I posted is a stripped down version of https://github.com/dtczhl/dtc-raspberry ... /rpi-pwm.c

maybe I broke it, but I got the feeling the code has never been tested (no call to the main pwm setdata function)

-------------------------------------

so I found the issue with my bcm2835 port and ... it works !!!

the real issue was the data I was providing to the PWM

- on an arduino, a value of 128 will create a 50% duty cycle

- on the bcm2835, it appears to be not working that way, and I am still trying to figure this out

thanks for the precious help, guys !!!, I still have a long way to go to be a bare metal ninja jedi master

Return to “Bare metal, Assembly language”