Thank you for your answers!
@LdB: it's not about 32 bit vs. 64 bit, but running AArch64 mode on A53 vs. A72. And I need that in bare metal, so not under Linux.
@rpdom: unfortunately mailbox is a no go, because A53 and A72 uses different MMIO base address. We need to know that before we can use mailboxes. Actually that's what I'm trying to do, to determine the MMIO base address in run-time.
@DougieLawson: peeking into how the Linux kernel fills up /proc/cpuinfo with data is actually a very good idea! I feel stupid that I haven't thought of that! Thanks!
rst wrote: ↑
Mon Sep 09, 2019 2:42 pm
You can use the MIDR_EL1 system control register. It reports the PartNum in [15:4], which is 0xD03 for the Cortex-A53 (RPi 3) and 0xD08 for the Cortex-A72 (RPi 4).
That's exactly what I was looking for, thank you very very much!
EDIT: auch, I feel extremely stupid right now. Knowing the name of the system register, I was able to find that post
, and... it was written by me. :-O However rst provided the PartNum value for the RPi4, which I didn't know, so thanks!