Both nested and non nested typical setup is discussed on the ARM site (this is the 64bit .. 32bit is in it's section)
http://infocenter.arm.com/help/index.js ... 10s05.html
The bottom line
When the processor takes an exception to AArch64 execution state, all of the PSTATE interrupt masks is set automatically.
The Irq and Fiq are independent.
On multicore Pi's all the irq's are default routed to core0 but you can use the crosspoint in datasheet QA7 to change that. If you have high priority interrupts like on an RTOS you may like to spread them out across the cores. Also remember on the Pi1 there is 64 interrupt sources (73 on a Pi3) and you need to check all flags when taking an interrupt because they can and often do overlap. In easy samples you start with you may only enable one of the 60 plus interrupt sources so you can ignore this but you can't in a proper system using the interrupts.