LeMury
Posts: 4
Joined: Mon Jun 11, 2018 3:06 pm

Multi-core example fails on Pi3 B+, aarch32?

Mon Jun 11, 2018 3:37 pm

Hello,

I am trying to get cores 1 to 3 to work on a PI3 B+, in aarch32 mode.
I am using Dwelch's serial bootloader07 (also in aarch32 mode) and trying his multi00 example.
( https://github.com/dwelch67/raspberrypi ... er/multi00 )

My SD card contains:
- bootcode.bin
- fixup.dat
- start.elf
- kernel7.img
(no config.txt!)

It prints the hex string 0x12345678 and the cpu id 0x80000000.
After that nothing.
Is the multi00 example supposed to work on a PI3 B+?

I have been reading/searching posts on this forum about multi-core but haven't found
a solution so far.

User avatar
Paeryn
Posts: 2010
Joined: Wed Nov 23, 2011 1:10 am
Location: Sheffield, England

Re: Multi-core example fails on Pi3 B+, aarch32?

Mon Jun 11, 2018 8:01 pm

The stub that gets loaded by default has CPUs 1-3 waiting for the CPU's event signal before they check their mailbox for a start address (this allows the cores to go into low-power mode and wait rather than constantly checking). At a guess, try adding the SEV instruction after setting the target address to the code that is supposed to wake each CPU up.

Example, in start.s

Code: Select all

.globl start1
start1:
    ldr r0,=start_cpu1
    mov r1,#0x40000000
    str r0,[r1,#0x9C]
    sev
    bx lr
She who travels light — forgot something.

LdB
Posts: 755
Joined: Wed Dec 07, 2016 2:29 pm

Re: Multi-core example fails on Pi3 B+, aarch32?

Tue Jun 12, 2018 2:00 am

Paeryn is correct you need sev in each of the core 1,2,3 starts, they changed the bootstub loader a while ago to now sleep the cores while they are parked. Davids code is from a period when the bootstub loader didn't do that.

However the reason for the comment is there is something even more weird the CPU id should be

Code: Select all

.globl showcpu0
showcpu0:
    mrc p15, 0, r0, c0, c0, 0       ;@ Read CPU ID Register
    bx lr		
The existing returns the CoreId which is the lower two bits of the value and perhaps the function is just badly named.
From the function name I was expecting something like 0x410FD034 not 0x80000000

LeMury
Posts: 4
Joined: Mon Jun 11, 2018 3:06 pm

Re: Multi-core example fails on Pi3 B+, aarch32?

Tue Jun 12, 2018 10:33 am

Paeryn wrote:
Mon Jun 11, 2018 8:01 pm
The stub that gets loaded by default has CPUs 1-3 waiting for the CPU's event signal before they check their mailbox for a start address (this allows the cores to go into low-power mode and wait rather than constantly checking). At a guess, try adding the SEV instruction after setting the target address to the code that is supposed to wake each CPU up.
Thanks a lot Paeryn . That was it, the cores are running.

However; the cores can not see changes to some local variable in memory.
I guess this has to do with shared memory regions, MMU setup etc...?

LdB
Posts: 755
Joined: Wed Dec 07, 2016 2:29 pm

Re: Multi-core example fails on Pi3 B+, aarch32?

Tue Jun 12, 2018 11:43 am

100% correct and you won't be able to do primitives between the core because things like LDREX and STREX will likely fail.

dwelch67
Posts: 930
Joined: Sat May 26, 2012 5:32 pm

Re: Multi-core example fails on Pi3 B+, aarch32?

Tue Jun 12, 2018 2:17 pm

seriously they changed the bootloader? it doesnt spin in a loop anymore? it puts the core to sleep? is there a thread/posting with the disassembly?

will have to re-visit this when I have time...

Thanks,
David

dwelch67
Posts: 930
Joined: Sat May 26, 2012 5:32 pm

Re: Multi-core example fails on Pi3 B+, aarch32?

Tue Jun 12, 2018 2:18 pm

also that is likely a really old example...would it even work on a pi3 b+?

LdB
Posts: 755
Joined: Wed Dec 07, 2016 2:29 pm

Re: Multi-core example fails on Pi3 B+, aarch32?

Tue Jun 12, 2018 3:04 pm

The Pi3B+ is same as Pi3, David just the activity LED is moved again back to normal GPIO 29 and new max core speed is 1.4Ghz

So yes your code still works just needs the sev instructions.

User avatar
Paeryn
Posts: 2010
Joined: Wed Nov 23, 2011 1:10 am
Location: Sheffield, England

Re: Multi-core example fails on Pi3 B+, aarch32?

Tue Jun 12, 2018 4:22 pm

dwelch67 wrote:
Tue Jun 12, 2018 2:17 pm
seriously they changed the bootloader? it doesnt spin in a loop anymore? it puts the core to sleep? is there a thread/posting with the disassembly?

will have to re-visit this when I have time...

Thanks,
David
They are here. AFAIK armstub.S is the one loaded for the RPi0/1, armstub7.S is the 32-bit RPi2/3 and armstub8.S is the 64-bit RPi2/3 (new RPi2, not the original Cortex-A7 which isn't 64-bit).
She who travels light — forgot something.

LeMury
Posts: 4
Joined: Mon Jun 11, 2018 3:06 pm

Re: Multi-core example fails on Pi3 B+, aarch32?

Tue Jun 12, 2018 6:20 pm

LdB wrote:
Tue Jun 12, 2018 11:43 am
100% correct and you won't be able to do primitives between the core because things like LDREX and STREX will likely fail.
Whilst on the subject;
Is there some nice tutor/write-up on how to correctly init things like MMU, Pagetable, i-cache, dcache, FPU etc.?
(Preferable for PI3, Aarch32, in asm and/or C)
All I have found so far are incomplete bits & pieces in some tutors and posts.

LeMury
Posts: 4
Joined: Mon Jun 11, 2018 3:06 pm

Re: Multi-core example fails on Pi3 B+, aarch32?

Tue Jun 12, 2018 6:25 pm

LeMury wrote:
Tue Jun 12, 2018 6:20 pm
LdB wrote:
Tue Jun 12, 2018 11:43 am
100% correct and you won't be able to do primitives between the core because things like LDREX and STREX will likely fail.
Whilst on the subject;
Is there some nice tutor/write-up on how to correctly init things like MMU, Pagetable, i-cache, dcache, FPU etc.?
(Preferable for PI3, Aarch32, in asm and/or C)
All I have found so far are incomplete bits & pieces in some tutors and posts.
Like this;
https://github.com/dwelch67/raspberrypi/tree/master/mmu
...unfortunately PI1 only...??

dwelch67
Posts: 930
Joined: Sat May 26, 2012 5:32 pm

Re: Multi-core example fails on Pi3 B+, aarch32?

Tue Jun 12, 2018 9:49 pm

I have raspberrypi-zero and raspberrypi-three repos to try to reboot the examples without the now years of old examples that are mixed in from the original to the public pi1 boards. Most of the work is on the arm11 so the pi-zero basically now, the pi3 work I only went so far they are significantly more complicated and you need to choose an execution level, so the problems multiply by two or three to start just for execution levels you might actually use, then there is of course 32 bit vs 64 and then there is hyp mode or not, and other items that continue to multiply the valid use cases, which are not necessarily compatible with each other. Honestly I have no desire to go down each and have an example for each. Would like to have examples for at least one of each of these topics., not sure if I had the strength to do that...fpu though should be pretty straight forward, on the older core you had to enable the coprocessor which was generally what blocked folks and was easy to enable, but the armv8 I just dont remember off hand without looking at my stuff and then the docs...

once the fpu is enabled then the next major hurdle is getting gcc or your favorite compiler to generate the right instructions that your core supports. You would expect that to be easy and sometimes it is but sometimes not...

LDREX/STREX are particularly painful even on an armv6 if you dont really understand what they are for and how they work, get worse with the dual and quad cores which is what they were put there for, then the pi adds another layer of caching outside the arm which you should keep in mind.

one step at a time...

AlfredJingle
Posts: 66
Joined: Thu Mar 03, 2016 10:43 pm

Re: Multi-core example fails on Pi3 B+, aarch32?

Wed Jun 13, 2018 10:39 am

As it happens, I have FPU-activation in front of me ( pi3 Aarch32 )

Code: Select all

		mov r0, #0xf00000		@ make cp10 en 11 fully accesible - pi3 - see page 4272 of ARMv8 trm
		mcr p15, 0, r0, c1, c0, 2	@ Write r0 to CPACR
		isb

		mov r1, #0x40000000		@ Set FPEXC_EN bit to enable the FPU
		vmsr FPEXC, r1
		isb
		
going from a 6502 on an Oric-1 to an ARMv8 is quite a big step...

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