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Joined: Mon Feb 15, 2016 2:31 pm
Location: Saint-Petersburg, Russian Federation

[SOLVED] Compilation for Cortex-M3 with ARM RPi 2B Toolchain

Fri Feb 09, 2018 12:16 am

Hello, programmers. I'm trying to use armv7-rpi2-linux-gnueabihf toolchain to compile a program for STM32 microcontroller based on Cortex-M3 core.


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-std=gnu99 -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections -nostdlib -fsingle-precision-constant

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int main(void)
    for (;;)

But I'm getting following linker errors:

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armv7-rpi2-linux-gnueabihf/bin/ld.bfd: error: main.o: Conflicting architecture profiles M/A
armv7-rpi2-linux-gnueabihf/bin/ld.bfd: failed to merge target specific data of file main.o
Please tell me can I compile programs for both STM32 and RaspberryPi 2B by using only one toolchain? Or have I to install arm-none-eabi generic cross-compiler?

Last edited by G-Virus on Fri Feb 09, 2018 11:45 pm, edited 1 time in total.

Posts: 946
Joined: Sat May 26, 2012 5:32 pm

Re: Compilation for Cortex-M3 with ARM RPi 2B Toolchain

Fri Feb 09, 2018 4:37 am

While this is a baremetal forum it is a raspberry pi forum not stm32. but anyway:

I have many STM32 examples along side my raspberry pi repos. You can certainly use arm-whatever-gcc if you dont need C library functions as that gets operating system dependent and what operating system are you running? probably baremetal, none. you need to control the bootstrap to and you need to build thumb code and it needs a cortex-m vector table not a full sized arm exception table made up of instructions.

Ultra simple...hmmm...actually it almost didnt work for me, I see what you ran into then into another thing...


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.cpu cortex-m3
.globl _start
.word 0x20001000
.word reset
.word hang
.word hang
.word hang
.word hang
.word hang
.word hang
.word hang
@ ...
    bl notmain
    @ b hang @ fall through
    b hang

.globl dummy
    bx lr

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void dummy ( unsigned int );
int notmain ( void )
    unsigned int ra;

    for(ra=0;ra<100;ra++) dummy(ra);
can craft a simple linker script like the ones I make for my raspi which are also modified for mcus, etc...or for this example, not

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arm-linux-gnueabihf-as start.s -o start.o
arm-linux-gnueabihf-gcc -O2 -c -mthumb -march=armv7-m notmain.c -o notmain.o
arm-linux-gnueabihf-ld -Ttext=0x08000000 -Tdata=0x20000000 start.o notmain.o -o notmain.elf
arm-linux-gnueabihf-objdump -D notmain.elf > notmain.list
arm-linux-gnueabihf-objcopy -O binary notmain.elf notmain.bin	
arm-linux-gnueabihf-objcopy --srec-forceS3 notmain.elf -O srec notmain.srec
arm-linux-gnueabihf-objcopy notmain.elf -O ihex notmain.hex
as always with a new build check the output

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Disassembly of section .text:

08000000 <_start>:
 8000000:	20001000 	andcs	r1, r0, r0
 8000004:	08000025 	stmdaeq	r0, {r0, r2, r5}
 8000008:	08000029 	stmdaeq	r0, {r0, r3, r5}
 800000c:	08000029 	stmdaeq	r0, {r0, r3, r5}
 8000010:	08000029 	stmdaeq	r0, {r0, r3, r5}
 8000014:	08000029 	stmdaeq	r0, {r0, r3, r5}
 8000018:	08000029 	stmdaeq	r0, {r0, r3, r5}
 800001c:	08000029 	stmdaeq	r0, {r0, r3, r5}
 8000020:	08000029 	stmdaeq	r0, {r0, r3, r5}

08000024 <reset>:
 8000024:	f000 f802 	bl	800002c <notmain>

08000028 <hang>:
 8000028:	e7fe      	b.n	8000028 <hang>

0800002a <dummy>:
 800002a:	4770      	bx	lr

0800002c <notmain>:
 800002c:	b510      	push	{r4, lr}
 800002e:	2400      	movs	r4, #0
 8000030:	4620      	mov	r0, r4
 8000032:	3401      	adds	r4, #1
 8000034:	f7ff fff9 	bl	800002a <dummy>
 8000038:	2c64      	cmp	r4, #100	; 0x64
 800003a:	d1f9      	bne.n	8000030 <notmain+0x4>
 800003c:	2000      	movs	r0, #0
 800003e:	bd10      	pop	{r4, pc}
the stm32 application space is at 0x08000000 which is strange because it should boot from 0x00000000 and does, they map that in if booting your code, they can map in another flash/rom that is the bootloader instead (to 0x00000000). by having the vectors at the actual/alternate address you instantly jump there and stay there and dont care too much about what is at 0x00000000 (well your vector table is ideally).

first word in the binary is loaded into the sp for you, you can later load the sp the traditional way but this is a freebie why not.
second word is the THUMB address to the reset vector, the address with the lsbit set (thank you thumb_func in gas syntax, see what happens if you remove it). and so on through the vector table, worst case you can have either 128+16 or 256+16 vectors depending on what the m3 supports and what the chip vendor has chosen to use. if you dont use interrupts then you can keep it short, if you never have bugs or faults then you can live with just the sp and reset.

the disassembly next to the vector table is bogus, I used the disassembler so it tries to disassemble everything, including ascii tables later in the elf. looking at the values for that part of the listing.

It didnt generate any thumb2 extensions/instructions, you said this was a cortex-m3 so you are in luck that is an armv7-m, when I tried it with armv6-m which you need for the cortex-m0(+), it complained, maybe a way around it maybe not.

the above is perfectly functional (yet useless) cortex-m program, if you have a nucleo board you can copy notmain.bin to the virtual thumb drive presented when you plug it in and it will load and run it. you need to then use say openocd to stop and single step the program to see anything interesting happening, but this is a starting point and shows you can use the toolchain although barely...

Posts: 11
Joined: Mon Feb 15, 2016 2:31 pm
Location: Saint-Petersburg, Russian Federation

Re: Compilation for Cortex-M3 with ARM RPi 2B Toolchain

Fri Feb 09, 2018 11:45 pm

Hello, dwelch67, thank you very much for your large response to me! I've tried to compile your code and it is works, I'm glad that I can use rpi2 toolchain to work with stm32 microcontrollers (I just tried to compile typical examples from Internet and they need not hard float point toolchain to compile them). But with your sample It compiles perfectly. The problem is solved, but I have a few questions to you, can you help me a little more? write me to PM please

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