No, there's no GDT on ARM as it does not implement segmentation at all (as a matter of fact, long mode only uses some compatibility and access right bits from the GDT and not the base+limit values, so strictly speaking there's no segmentation on x86_64 either).
As for the IDT, there's no need. Think it this way: on AMD64 you'd build an IDT with addresses each pointing to a handler code aligned by 128 bytes.
Code: Select all
1.entry-------> 1.handler (128 bytes)
3.entry-\ \--> 2.handler (128 bytes)
\---> 3.handler (128 bytes)
On ARM you would not point a system register to that IDT (like with sidt), but rather the system register (VBAR_ELx) points directly to the first code, therefore no need for a table at all. On AMD64 you have different kind of handlers (traps, gates etc.) defined in the entries of IDT, on ARM you have only one handler for each kind (Excpetion, IRQ, FIQ, SError). The IDT holds separate handlers for each exception and IRQ, on ARM (since you have only one handler per kind) you can read the exception's code from a system register. Same with IRQs.
Older ARM versions required the handlers to start at address 0 (just like in real mode on x86) and used only 4 bytes for each handler (enough to encode a jump instruction), so it looked more like an IDT. On ARMv8 you are free to place handler code anywhere in memory, also you have 128 bytes for each, which is more than enough to read system registers, set up arguments and call a common handler if you want.
For reference I'd recommend ARM DDI0487