Ark_42
Posts: 28
Joined: Tue Sep 04, 2012 5:09 pm

uart rx with interupts

Wed Oct 17, 2012 2:01 pm

I am doing this in assembler.
I have sucessfully used the uart for recieving and transmitting without using interupts ( based on dwelsh67's bootloader5 converted to assembler ) and now want to process input using interupts rather than waiting for the input.
I have sucessfully got the timer interupts to work, so I know my interupt handler works
Using the BCM datasheet I have set IRQ_ENABLE_2 to 0x02000000 ( gpio irq 57 - the uart) and AUX_MU_IER_REG to 0x00000002 ( rx interupts enabled ) and have set the interupt enable bit in the psr register ( in suprervisor mode ). Diagnostics show these all set correctly and AUX_IRQ = 0x80000001 ( uart has interupt pending ) when I send in a character but no interupt has been caught.
What else do I have to set to enable the rx interupts ?

Thanks

Richard

Steverino
Posts: 23
Joined: Sun Aug 19, 2012 2:44 pm

Re: uart rx with interupts

Wed Oct 17, 2012 2:17 pm

Hi Richard,

David's uart04 example shows how to set up the RX interrupts for the mini UART.

Steve

Ark_42
Posts: 28
Joined: Tue Sep 04, 2012 5:09 pm

Re: uart rx with interupts

Wed Oct 17, 2012 2:49 pm

Thanks for that clue, I'll have a look at that

Richard

Ark_42
Posts: 28
Joined: Tue Sep 04, 2012 5:09 pm

Re: uart rx with interupts

Wed Oct 17, 2012 4:52 pm

That example had the answers - all now working.

The interupt number was wrong and one of the manual entries incorrect/incomplete.

Many thanks for the suggestion and to dwelsh67 for the code example

Richard

rupertr
Posts: 11
Joined: Fri Sep 07, 2012 2:21 am

Re: uart rx with interupts

Thu Oct 18, 2012 5:41 am

Ark_42 wrote:one of the manual entries incorrect/incomplete.
If you don't know about the manual errata, best give it a quick look:
http://elinux.org/BCM2835_datasheet_errata

gertk
Posts: 52
Joined: Mon Aug 29, 2011 9:08 am

Re: uart rx with interupts

Sun Oct 28, 2012 5:27 pm

Is there an updated version about the AUX_MU_IER_REG

In the example bits 0 and 2 are set in this register but according to the manual for receive interrupts it should be bit 1 ?? In the Errata I could not find an edited description only:
Bits 3:2 are marked as don't care, but are actually required in order to receive interrupts.
It also took me some time to get the serial receive interrupt going until I found out I had two setup routines in my source tree (one called setup.s and one called vectors.s) Most spectacular crashes :D
But finally it worked. Two way communication.. Yeah!

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