koparasy
Posts: 7
Joined: Wed Jun 14, 2017 8:21 am

Disable Prefetch on Raspberry PI 3b.

Fri Jun 16, 2017 10:58 am

I am using a bare metal library called circle and i want to characterize the power/energy consumption of raspberry PI when stressed under overclocked settings. Having said that currently I am experimenting in single core executions, and i characterize memory intensive tests. The arm-cortex-a53 is equiped with a prefetcher which fetches data based on stride patterns. I would like to disable the prefetcher or modify the prefetching schemes it uses. From the arm-cortex a53 manual i found a register, called CPUACTLR which controls the prefetching unit. I try to modify the register in HYP mode. Basically it is the first thing the CPU does after the GPU boot. I added the following code in startup.S https://github.com/rsta2/circle/blob/ma ... /startup.S below line:

Code: Select all

mrrc    15, 0, r2, r3, cr15
bic r2, r2, #57344  ; 0xe000
mcrr    15, 0, r2, r3, cr15
This code should set to zero the bits [13-15]. However when i read the register again the bits have not changed. I was wondering if anyone has managed to change the value of CPUACTLR. And how he did it.

LdB
Posts: 432
Joined: Wed Dec 07, 2016 2:29 pm

Re: Disable Prefetch on Raspberry PI 3b.

Fri Jun 16, 2017 1:22 pm

Not done one of these 64 bit registers in 32bit so I query are you sure r2 is the low 32bits

When I read that opcode I read value goes to r2:r3 not r3:r2.
Last edited by LdB on Fri Jun 16, 2017 1:25 pm, edited 1 time in total.

koparasy
Posts: 7
Joined: Wed Jun 14, 2017 8:21 am

Re: Disable Prefetch on Raspberry PI 3b.

Fri Jun 16, 2017 1:25 pm

I did try both r2:r3 and r3:r2 with no effect.

LdB
Posts: 432
Joined: Wed Dec 07, 2016 2:29 pm

Re: Disable Prefetch on Raspberry PI 3b.

Fri Jun 16, 2017 1:26 pm

Try it in service mode rather than hyp as well :-)

Wouldn't surprise me if you cant write to it after bootloader has executed as it says you aren't suppose to access it after activity.

Update:
Looked at U-Boot is this the same register ... different opcode?
+ mrs x0, S3_1_c15_c2_0 /* cpuactlr_el1 */
+ /* Disable non-allocate hint of w-b-n-a memory type */
+ mov x0, #0x1 << 49
+ /* Disable write streaming no L1-allocate threshold */
+ mov x0, #0x3 << 25
+ /* Disable write streaming no-allocate threshold */
+ mov x0, #0x3 << 27
+ msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */
Last edited by LdB on Fri Jun 16, 2017 1:46 pm, edited 1 time in total.

koparasy
Posts: 7
Joined: Wed Jun 14, 2017 8:21 am

Re: Disable Prefetch on Raspberry PI 3b.

Fri Jun 16, 2017 1:45 pm

And how can i execute code during boot. To my understanding bootcode.bin is given as binary and the source is not available. After bootcode.bin terminates startup.s executes. I am not using u-boot or something inbetween. I did try it in service mode and the system completely freezes.

LdB
Posts: 432
Joined: Wed Dec 07, 2016 2:29 pm

Re: Disable Prefetch on Raspberry PI 3b.

Fri Jun 16, 2017 1:49 pm

Look above .. we crossed posts is that the same register?

Crash is better than nothing it means it is at least doing something most likely it just threw a elevated fault :-)

koparasy
Posts: 7
Joined: Wed Jun 14, 2017 8:21 am

Re: Disable Prefetch on Raspberry PI 3b.

Fri Jun 16, 2017 2:25 pm

it is the same register a different opcode use when executing on 64 bit http://infocenter.arm.com/help/index.js ... IGCEB.html

LdB
Posts: 432
Joined: Wed Dec 07, 2016 2:29 pm

Re: Disable Prefetch on Raspberry PI 3b.

Fri Jun 16, 2017 2:53 pm

Well I tried both HYP and SRV as well and the read opcode does not work, as in I always get R2 and R3 back with a value of zero.

mrrc 15, 0, r2, r3, cr15
returns r2 and r3 = 0

I set the values of r2 and r3 to 0x55AA before the call to check the read at least does something.

koparasy
Posts: 7
Joined: Wed Jun 14, 2017 8:21 am

Re: Disable Prefetch on Raspberry PI 3b.

Fri Jun 16, 2017 3:15 pm

In my rpi3b when i read the register i get a value. Dont remember the exact value, and i cant access the rpi now.

LdB
Posts: 432
Joined: Wed Dec 07, 2016 2:29 pm

Re: Disable Prefetch on Raspberry PI 3b.

Fri Jun 16, 2017 3:44 pm

You made me go and check and I did only the one register .. so correction.

R3 always comes back as 0x00000000
R2 always comes back as 0x090CA000

Changing and writing R2 does nothing I still read 0x090CA000 in HYP mode (crashes in service mode)

Update: Think I found out why you can't write to it in HYP mode (EL2) ... look at ACTLR
http://infocenter.arm.com/help/index.js ... GHIBG.html

LdB
Posts: 432
Joined: Wed Dec 07, 2016 2:29 pm

Re: Disable Prefetch on Raspberry PI 3b.

Fri Jun 16, 2017 4:23 pm

Yep that was it .. works in HYP mode now

Code: Select all

	mrc p15, 0, r2, c1, c0, 1
	orr r2, #1
	mcr p15, 0, r2, c1, c0, 1
	mrrc    p15, 0, r2, r3, cr15
	bic r2, r2, #57344 
	mcrr    p15, 0, r2, r3, cr15
0x090CA000
becomes
0x090C0000

Thanks for that .. found a new register to play with :-)

koparasy
Posts: 7
Joined: Wed Jun 14, 2017 8:21 am

Re: Disable Prefetch on Raspberry PI 3b.

Mon Jun 19, 2017 8:05 am

Thank you for finding the ACTLR register. However in my case this is not working. In the raspberry PI 3b the value of the CPUACTLR is : 0X90CA000. I copy pasted your code into my startup.S and it is executed on HYP mode. However, the value is not changed. Am I missing something? BTW I am not using u-boot.

Return to “Bare metal”

Who is online

Users browsing this forum: No registered users and 3 guests