It's a little bit trickier than that, you are sort of referring to what the BootLoader defaults at. I was hoping Ultibo or David may answer this as they are more technically across this. The PI isn't a microprocessor with a simple fixed memory map like you are trying to treat it.
Anyhow lets put it in background ... open the peripheral data sheet and goto page 5. The diagram is turned sideways because it needs the width under the section 1.2 Address map, 1.2.1 Diagrammatic overview
https://www.raspberrypi.org/app/uploads ... herals.pdf
See the two memory management units (MMU's) one for the VC and one for the ARM.
It also shows you the arm MMU can virtualize memory anywhere between from 0x00000000 to 0xFFFFFFFF to the ARM.
So technically the memory map can change by changing the arm MMU, so all I can really talk about is what the Bootloader defaults with.
So the default is shown on that figure at the top which says size of Physical memory set in arm_loader 0x40000000 .. hopefully you see it.
Now the next complication there is some sort of granularity around the memory settings in the MMU. I don't know the in's and out's of the MMU but for whatever reason around that the IO space for the Pi2/3 gets mapped inside that physical memory not outside it. The IO space is 1Mb so technically you only get 1023Mb of memory on a Pi2/3 1Mb of your memory can not be accessed because the IO maps onto it.
If you look at the official documentation:
https://www.raspberrypi.org/documentati ... /README.md
No arm MMU details and I don't know if it has ever been released
So the default setup on the bootloader on the Pi3 places the last memory byte at 0x3EFFFFFF being the byte below the IO space start at 0x3F000000.
However it doesn't end there you will find the memory repeats there is memory at 0x40000000+
Now look at the diagram on the VC side and you will find the memory marked as '4' Alias - L2 cache coherrent (non allocating).
Look above and that and you will see it maps to 0x80000000 and 0xC0000000.
This harks back to the having to OR and AND NOT 0xC0000000 onto the pointer on your framebuffer. Yes the VC can and does access the same memory as well.
So the memory is also accessed by cache and the VC.
To be really technical the VC is the most important processor the ARM is a coprocessor but it seems weird to think like that because all our code runs on the ARM. I am not even sure the ARM has direct access to the physical hardware given the way it is setup I suspect it just sees the VC bus.
So the problem I was having with your question is it is very hard to answer because all that detail needs to be relayed ... in that light can you refine what you are asking
The offical word on memory:
https://www.raspberrypi.org/documentati ... dresses.md