ChibiOS on RPi low core


7 posts
by rvanspaa » Fri Jun 02, 2017 8:29 am
Hi,

Can someone tell me if the GPU uses any of the memory below 0x8000 and if so, what & what for exactly?

TIA
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by Ultibo » Fri Jun 02, 2017 9:56 am
rvanspaa wrote:Can someone tell me if the GPU uses any of the memory below 0x8000 and if so, what & what for exactly?

Hi,

By default during boot the GPU copies a small piece of code called the armstub to 0x0 and sets up the ARM tags at 0x100 which contains the command line and other information (although later firmware prefers to put the device tree information at 0x100 instead unless you tell it not to).

Both of those should fit within the first 4K (probably 1K) and as far as I know there is nothing else placed in that region by the GPU.
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by rvanspaa » Sat Jun 03, 2017 12:39 am
Thanks.

I have a tight loop in ChibiOS designed to measure the CPU speed. It contains just an add, a compare and a branch instruction.
Should complete in about 4-5 ns (which in a similar program running under raspbian it does), however running under ChibiOS it takes about 70 ns for the loop. Not only that but the benchmarks in "test" also take about the same time as those running on a 70 MHz machine from a different supplier. My current guess is that somehow the GPU has been "tricked" into running the ARM at a low speed. I thought perhaps a memory corruption of the field where it stores the speed that the ARM is supposed to run at?
Last edited by rvanspaa on Sat Jun 03, 2017 2:45 am, edited 1 time in total.
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by Ultibo » Sat Jun 03, 2017 1:10 am
rvanspaa wrote:Should complete in about 4-5 ns (which in a similar program running under raspbian it does), however running under ChibiOS it take about 70 ns for the loop.

Have you enabled the MMU, data cache, instruction cache and branch prediction?
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by rvanspaa » Sat Jun 03, 2017 2:53 am
Ultibo wrote:
rvanspaa wrote:Should complete in about 4-5 ns (which in a similar program running under raspbian it does), however running under ChibiOS it take about 70 ns for the loop.

Have you enabled the MMU, data cache, instruction cache and branch prediction?


Not intentionally. (Code mostly inherited). Thanks for the tip, I'll check it out, though the counting is done in registers, so the only thing that would make a significant difference I think is the instruction cache. If each instruction had to be fetched from memory before execution, then that would slow things down significantly.
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by rvanspaa » Sun Jun 04, 2017 7:06 am
Hi Ultibo,

I want to thank you again. Turning on instruction caching & branch prediction cut the tight loop time from 77 ns down to 4.3 ns.
General performance improved by about 33%. Next step, MMU & data cache.

You solved my problem, and taught me something too. :)

Best regards,

rvanspaa
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by Ultibo » Mon Jun 05, 2017 12:06 am
rvanspaa wrote:Turning on instruction caching & branch prediction cut the tight loop time from 77 ns down to 4.3 ns.

That's an excellent result.

rvanspaa wrote:Next step, MMU & data cache.

You have some reading to do, but you will also find quite a few people on this forum who have worked through the details of this if you do run into any problems.
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