Hi again Jonvii I have been down with flu, but it sounds like you solved most of it in meantime without me
You already have the answer you use the GPEDS if they aren't set it's not a GPIO interrupt branch over it.
The timers also have status registers with a similar bit identifying if it is the interrupt source.
As you are doing baremetal, you are the only one who can set interrupts to trigger they are all masked to off by default so you are in control of the only possible sources.
As for clearing GPIO interrupts page 96 ... you write a 1 to the GPED bit you want to clear .. zero to everything else so just roll a "1" to the right place much the same as your GPIOSET code.
https://www.raspberrypi.org/documentati ... herals.pdf
The relevant bit in the event detect status registers is set whenever: 1) an edge is detected that matches the type of edge programmed in the rising/falling edge detect enable registers, or 2) a level is detected that matches the type of level programmed in the high/low level detect enable registers. The bit is cleared by writing a “1” to the relevant bit.
Timer is similar you hit the IrqClear register page 198 .. you write a 1 to clear it (offset 0x40c). The raw Irq status is available to check source (offset ox410).
Just remember if is set to drop thru and check the other in chain as it may have interrupted in meantime while you were dealing with interrupt ... again a normal chained interrupt thing.
It's quite normal to have to identify irq source by checking status masks on the Pi. You could imagine if they made an interrupt vector for each GPIO port alone (like you might see on a microcontroller) that would be 54 and you should see the irq controller would get massive.