I'm trying to use the ARM1176JZF-S cycle counter (MRC p15, 0, R0, c15, c12, 1) to roughly measure IRQ latency in my little kernel. Things seem to be mostly working OK, but I've noticed an oddity.
My kernel invokes Wait-for-interrupt (MCR p15, 0, R0, c7, c0, 4) after setting a timer alarm by poking at the system timer.
Each time the IRQ handler runs, at the top of the handler, I read the cycle counter. The weird thing is that it is always 0x80000113 for a while, and then 0x60000113 seemingly forever. So it looks like somewhere -- either power management machinery, WFI machinery, or something weird I'm doing -- is resetting the cycle counter to 0x80000000 (or 0x60000000) at about the time the interrupt fires.
WFI does put the CPU into a sleep-ish mode, apparently -- perhaps it loses/resets the counter's value there? If so, where would that be documented? And why the weird behaviour where it sets the high nibble to 8 a few times, and then 6?
Any help or insight appreciated