mrvn
Posts: 58
Joined: Wed Jan 09, 2013 6:50 pm

Interrupts on RPI2 / SMP

Thu Feb 26, 2015 9:01 am

Now that everyone has an RPi2 and has the extra cores up and running (you did buy one, right? And saw the SMP demos? :) ) the next step is figuring out the interrupts and inter process communication.

So far I figured out that Broadcom tagged on extra interrupts on top of what RPi1 had and there should be a core local timer in the extra block. Has anyone figured out how many interrupts there are now and what they are?

What is the mechanism to send interrupts from software between cores?


kriss
Posts: 66
Joined: Thu Apr 02, 2015 8:53 pm
Location: france for now ...

Re: Interrupts on RPI2 / SMP

Mon Apr 20, 2015 3:53 pm

is it not when re-enabling a core that you give the adresse to jump ?

krohini
Posts: 8
Joined: Tue Jun 16, 2015 6:57 am

Re: Interrupts on RPI2 / SMP

Sat Aug 08, 2015 7:26 pm

Hi,
Has anybody been able to generate software interrupts between cores?

rst
Posts: 436
Joined: Sat Apr 20, 2013 6:42 pm
Location: Germany

Re: Interrupts on RPI2 / SMP

Sun Aug 16, 2015 9:48 am

krohini wrote:Hi,
Has anybody been able to generate software interrupts between cores?
I used IPIs to force other cores into a halt loop in case of an error condition. This could be extended for other purposes:

https://github.com/rsta2/circle/blob/ma ... ticore.cpp

The LocalInterruptHandler() has to be called at the beginning of the IRQ handler.

krohini
Posts: 8
Joined: Tue Jun 16, 2015 6:57 am

Re: Interrupts on RPI2 / SMP

Tue Aug 18, 2015 10:36 am

Thanks for that! :) Can the mailbox3 be used as well? And how can we figure out interrupt IDs as are used by ARM GIC?

rst
Posts: 436
Joined: Sat Apr 20, 2013 6:42 pm
Location: Germany

Re: Interrupts on RPI2 / SMP

Tue Aug 18, 2015 11:50 am

krohini wrote:Thanks for that! :) Can the mailbox3 be used as well? And how can we figure out interrupt IDs as are used by ARM GIC?
I think mailbox3 can be used too if you enable its IRQ in the "Core3 Mailboxes interrupt control" register according to this document. But note that mailbox3 is normally also used at boot time to let a CPU core jump to a specific address to start execution.

I think in a bare metal environment you are the only one who defines and uses IPIs. So you can use any valid ID.

I wrote this code before the QA7 document became available and got the information from Linux. The code works a bit like Linux is doing it (or did it at this time?). The hardware may allow different approaches.

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