I still struggle to dynamically change the EL with my PI3 in AARCH64. (If I do it at boot from reset, I can enter EL2 or EL1 successfully, no pb here).
I start the ARM in 64bits at EL3 and keep it at this level. Then I want to dynamically switch to EL2. So, I call HVC #0.
This triggers the Sync Exception of EL3 as expected with EC = 0b010110, meaning HVC call in 64 bits. This is still ok here.
In this exception handler, I modify SPSR_EL3 EL bits to EL2, then after some debug prints (serial terminal), I leave the exception handler with an ERET.
But, as soon as the above exception handler returns, another exception is fired, that one vector 0x480, 'IRQ 64 bits from lower EL' still at EL3.
That IRQ, I have no idea why it is triggered ! IRQ are disabled in my startup. It seems this exception comes from EL2, but I cannot find out why and cannot clear it : so it fires continuously...
I know I don't give much details but just as it, is there anything obviously wrong ? And how can I find out the reason of the IRQ ? I'm not sure I can rely on the EC for an IRQ (I checked it in case, but it returns the same value in the IRQ as in the Sync exception).
Thank you for any idea / advice...