Opencores.org has a lot of
IPs. I am thinking getting a FPGA chip with embedded
Dram and Flash. Maybe this way is going tgoin to be even cheaper..v

I am reliably informed that the FPGA setup used to simulate just *parts* of the SoC is approximately the size of a domestic fridge. There are a lot of chips inside.ShiftPlusOne wrote:Even if the GPU was fully open, I can't begin to imagine what the FPGA to run it would cost and how much heat it would give off. I almost suspect it would need to be a rack of FPGA boards costing more than any sensible person would invest for this purpose.
Frozen chips?jdb wrote:I am reliably informed that the FPGA setup used to simulate just *parts* of the SoC is approximately the size of a domestic fridge. There are a lot of chips inside.

I'll ask around - I think we buy them in but I am not sure. They may be custom in which case a photo may be pushing it!ShiftPlusOne wrote:I thought I was exaggerating, since my experience with FPGAs doesn't go much beyond implementing simple state machines and ALUs for the hell of it years ago.
If BCM doesn't mind, could you by any chance snap a photo of it? I think it would be interesting.

Thanks, James!jamesh wrote: I'll ask around - I think we buy them in but I am not sure. They may be custom in which case a photo may be pushing it!
EDIT: Do a search for HAPS FPGA to get an idea of what is involved.


I would! Just once, to see what it feels like!ShiftPlusOne wrote:Wouldn't want to be the guy to spill a coffee in one of those.
FWIW... from July - Nov. 2001 there was an incomplete ARM v7 compatible design available for free download. It was done by a grad student. However ARM put a stop to that. Google "ARM clone Shengyu Shen"ghans wrote:...AFAIK there aren't many free ARM cores around either because ARM Ltd. would sue you into oblivion if you tried to distribute one. The only thing i could find were ARMv3 designs - state-of-the-art of the 1990s .
A near but not perfect clone of the ARM7 according to the OpenCores Web site, the nnARM runs all ALU, multiply, MAC and Program Status Register instructions. It also supports all single data transfer instructions, branches and certain forms of conditional execution.
Proving that the nnARM is very much a research vehicle, there are still several ARM functions it does not support. It does not support interrupt and exception handling, single data swap, block data transfer or coprocessor instructions, although Shen continues to upgrade the design.