Having just endured getting Midas OLED displays working with an FPGA design, I suggest the best thing you can do is to buffer the signals to be proper 5V levels.
We too would get random junk, especially if probing the signals or even touching them.
I know it hurts, but READ THE DATASHEET'S DC SPECIFICATIONS.
The OLED displays are CMOS style inputs, VIN high must be 0.8V x VDD - which 3.3V is very much not.
ie > 4V is required for a high
As the RPi is a 3V3 device, it's logic levels simply do not cut the mustard.
We used a 74HCT245 which accepts TTL logic levels in (good for RPi outputs) but drives healthy 0V / 5V signals out.
Damn thing works like a Trojan now.
Ultra reliable whereas flaky as get out without the extra buffer.
Note we fly open loop, do not read back the ready flag, just use delays.
If you do read the ready flag, you'll also need to buffer in the reverse direction to condition the 5V stuff back to 3V3 levels.
Possibly use another pin to read from?