We've just released the schematics!

[liz]

See this post from Eben on the main page. I know a lot of you though I was talking out of my backside when I told you we'd be doing this - please submit your humble pi(e) below!

[ukscone]

liz said:


please submit your humble pi(e) below!


a la mode?

[liz]

Right at the moment, it is best if the ice cream is coffee-flavoured.

[ukscone]

liz said:


Right at the moment, it is best if the ice cream is coffee-flavoured.


It's not ice cream but i just chucked a couple of coffee ice cubes in my glass of chocolate milk

[john_wage]

Good stuff.

[jbeale]

I somehow had the impression that the +5V rail did not go directly to the main SoC, but I see it does connect at five points; A13,A14,A15,B13,B14.  The schematic grouping and pin names imply it is used by the internal switcher to generate VDD_CORE.  Good to know.

[scep]

They said it couldn't be done, but using the schematics I have made my own RasPi. Fools!

[ukscone]

scep said:


They said it couldn't be done, but using the schematics I have made my own RasPi. Fools!




is that a class10 sd card?

[hippy]

Excellent news and thanks.

Only one thing jumped out at me; if GPIO47 can be set output high, it's a short via the SD Card Detect to 0V. Not sure if it's possible to set it that way by accident or what damage it would do if one did.

Having 5V-0V-TXD-RXD on the GPIO as a consecutive block of four is a nice and useful surprise.

[johnbeetem]

jbeale said:


I somehow had the impression that the +5V rail did not go directly to the main SoC, but I see it does connect at five points; A13,A14,A15,B13,B14.  The schematic grouping and pin names imply it is used by the internal switcher to generate VDD_CORE.  Good to know.


Yes, that is very interesting... excellent observation.  I guess 10 uF C17 (probably multi-layer ceramic) provides the bulk +5V bypass when electrolytic cap C6 breaks off   Very nice that VDD_CORE is generated from +5V to reduce the load on +3.3V regulator RG2.

[rurwin]

Thanks loads for this.

liz said:


Right at the moment, it is best if the ice cream is coffee-flavoured.


I'll pass thanks. Ice-cream yes, coffee maybe, but coffee ice-cream is an abomination.

[Golem]

ukscone said:


scep said:


They said it couldn't be done, but using the schematics I have made my own RasPi. Fools!




is that a class10 sd card?



1+0+0= 100  

[Golem]

No, no… I’ve made a mistake --- let me recalculate this!

[Michael]

I've created an errata wiki page at http://elinux.org/RPi_schematic_errata to track any typos, etc the community might spot.

[bredman]

scep said:


They said it couldn't be done, but using the schematics I have made my own RasPi. Fools!


When are you shipping? Do you accept PayPal?

[jamesh]

bredman said:


scep said:


They said it couldn't be done, but using the schematics I have made my own RasPi. Fools!


When are you shipping? Do you accept PayPal?


You'll have to get to the back of the queue, so far there have been, let me see...100k, 200k, 350K.....1 order. By sceps Mum.

[selsinork]

scep said:


They said it couldn't be done, but using the schematics I have made my own RasPi. Fools!


I demand that you put all the connectors on the same side...

and that you add another gig of ram

and where's the VGA connector

and wouldn't an extra Gbit network be useful ?

and you forgot the SATA interface, and the PCIe 2.0 x16 slot

actually, just add a SODIMM slot while you're at it

Then make sure the price is $5 delivered to my door anywhere in the world, that I don't have to pay anything for delivery and that my Govt won't charge any import duty, tax or anything else...

Oh, and can you have 1 million shipped by Monday ??



P.S. does it run Windows ?

[mjtessmer]

Would it be possible to release a pinout and block diagram of the

BCM2835 SOC?

[Michael]

mjtessmer said:


Would it be possible to release a pinout and block diagram of the

BCM2835 SOC?


The pinout is given in the schematic: http://www.raspberrypi.org/wp-.....s-R1.0.pdf

The datasheet (http://www.raspberrypi.org/wp-.....herals.pdf) provides further detail on the GPIO pins.

A very basic board-level block diagram by Paul Beech:

http://elinux.org/images/thumb.....9x1024.png

There are a number of block diagrams in the datasheet, including 6-1 GPIO pins, 8-2 PCM audio interface, 10-6 serial interface

[Robert_M]

scep said:


They said it couldn't be done, but using the schematics I have made my own RasPi. Fools!





Where did you hide the Heisenberg Compensator?

[M0TGW]

Robert_M said:


scep said:


They said it couldn't be done, but using the schematics I have made my own RasPi. Fools!




Where did you hide the Heisenberg Compensator?


It's behind the flux capacitor

[AndrewS]

People interested in this thread may also like…


http://elinux.org/RPi_schemati....._breakdown
http://elinux.org/RPi_BCM2835_Pinout

[jbeale]

Great job on that netlist, Andrew!  I don't know how you found the patience to generate that!

[mjtessmer]

Thanks! Andrew

Gert:  Can you tell us which pins the I2S signals are on?

[rew]

hippy said:

Having 5V-0V-TXD-RXD on the GPIO as a consecutive block of four is a nice and useful surprise.
The GPIO pinout that was published mentions one of them as DNC. This means that a future run of RPIs might have a GPIO pin there.

Also note that you should not directly drive 5V onto the RXD line. If you do, you'll "shorten the lifetime of the SOC" as Liz always says.

Check out http://www.bitwizard.nl/catalo.....ucts_id=69 for the breakout to that ground-rxd-txd-5V pinout that you wanted. And it has a protection circuit that keeps your RPI in one piece if you drive it at 5V levels.