bullen
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RAM speed

Fri Jan 31, 2020 4:02 pm

Why are you deleting my topics?

What RAM speed does the pi's have?
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fruitoftheloom
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Re: RAM speed

Fri Jan 31, 2020 4:29 pm

bullen wrote:
Fri Jan 31, 2020 4:02 pm
Why are you deleting my topics?

What RAM speed does the pi's have?

https://www.raspberrypi.org/documentati ... locking.md
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Technocolour
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Re: RAM speed

Fri Jan 31, 2020 4:34 pm

What are you looking for?

Latency of the chips? Practical latency for the CPU?

Theoretical bandwidth, practical bandwidth (running what code?)?

Practical benches can be found here and there a Google away. Tom's did a nice test of the 4 iirc.

bullen
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Re: RAM speed

Fri Jan 31, 2020 6:03 pm

I'm going to link to the twitter chain that triggered my curiosity:

https://twitter.com/rygorous/status/1222986490914803712

Let's see if my topic gets removed again.

TLDR: The Wii was 4x slower than the Xbox and PS but the games ran ok because it uses 24MB SRAM that has very low latency!

So I'm looking for better memory in the pi!
I'm not able to overclock anything on my pi 4... I have tried everything...
Frequency of the SDRAM in MHz; default value is
400 on Pi 1/Pi 2,
450 on Pi 3/Pi Zero/Pi Zero W,
500 on Pi 3A+/3B+,
3200 on Pi 4B. SDRAM overclocking on Pi 4B is not currently supported
OK!!! nice!
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fruitoftheloom
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Re: RAM speed

Fri Jan 31, 2020 6:24 pm

bullen wrote:
Fri Jan 31, 2020 6:03 pm
I'm going to link to the twitter chain that triggered my curiosity:

https://twitter.com/rygorous/status/1222986490914803712

Let's see if my topic gets removed again.

TLDR: The Wii was 4x slower than the Xbox and PS but the games ran ok because it uses 24MB SRAM that has very low latency!

So I'm looking for better memory in the pi!
I'm not able to overclock anything on my pi 4... I have tried everything...
Frequency of the SDRAM in MHz; default value is
400 on Pi 1/Pi 2,
450 on Pi 3/Pi Zero/Pi Zero W,
500 on Pi 3A+/3B+,
3200 on Pi 4B. SDRAM overclocking on Pi 4B is not currently supported
OK!!! nice!

What has this Twitter Link you keep spamming any relevance to a Raspberry Pi SBC ?
Thinking outside the box is better than burying your head in the sand...

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mahjongg
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Re: RAM speed

Fri Jan 31, 2020 6:27 pm

bullen wrote:
Fri Jan 31, 2020 4:02 pm
Why are you deleting my topics?
Probably because of your signature that has an URL in it, which is a sign of a spammer, combined with a two line post.

Heater
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Re: RAM speed

Fri Jan 31, 2020 6:48 pm

bullen,
TLDR: The Wii was 4x slower than the Xbox and PS but the games ran ok because it uses 24MB SRAM that has very low latency!
That statement makes me think there is an important fact about modern computer architectures that you are missing. Forgive me if I am wrong.

Today we have very fast processors, 1GHz and up and very large RAMS. Not 24MB but gigabytes of RAM.

Turns out the processors can munch on instructions and data a hundred or so times faster than the gigabytes of dynamic RAM we have out on our motherboards. If the processors always accessed main RAM directly for every instruction fetch and every read and write of data they would run like molasses.

In order to speed things along a bit and keep the processor busy, rather than waiting for the slow RAM access all the time, we employ cache memory on the processor chip itself. If forget now how big the Pi processors cache is.

Not only that, there can well be multiple layers of cache memory, of various speeds and sizes, between the processor and the main RAM.

TLDR; The question of "RAM speed" is not so simple any more. Which RAM do you mean, cache or main memory? It's effects on performance depend heavily on cache size. And so on.

The speed of a program is often dictated by how it accesses memory. A program that keeps cache memory full with relevant data as much as possible will run many times faster than one that is always hoping around memory addresses and causing cache refills all the time.

All in all, I would not worry about it. Things run as fast as they do. Which is already impressive.
Memory in C++ is a leaky abstraction .

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Re: RAM speed

Fri Jan 31, 2020 7:02 pm

Expanding on what Heater said...

The Pi4 SoC has 4 ARM Cortex-A72 processor cores. According to Wikipedia, Cortex-A72 has L1 and L2 caches, but no L3. Generally speaking, on-chip cache memory is static RAM (SRAM). L1 cache is closest to the CPU cores and should be the fastest, but it will also be the smallest. For a Cortex-A72, there is 48KiB of L1 instruction cache and 32KiB of L1 data cache per core. This is backed up with 512KiB to 4MiB of L2 cache per cluster of up to 4 cores. In this design, the next memory layer down is the main DRAM, which is LPDDR4. Beyond that is external (mass) storage, which will be in the range of GB to TB, slower by orders of magnitude (out into the millisecond range).

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jahboater
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Re: RAM speed

Fri Jan 31, 2020 7:05 pm

Heater wrote:
Fri Jan 31, 2020 6:48 pm
TLDR; The question of "RAM speed" is not so simple any more. Which RAM do you mean, cache or main memory? It's effects on performance depend heavily on cache size. And so on.
The OP keeps referring to SRAM which means very fast and very expensive Static RAM. It needs several transistors per bit, not the one transistor that DRAM does (which needs constant refreshing). The new Pi4 uses DDR4, the older models used DDR2.

Edit: +1 for W.H.Heydt's comments that I cross posted.
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HawaiianPi
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Re: RAM speed

Fri Jan 31, 2020 7:49 pm

bullen wrote:
Fri Jan 31, 2020 6:03 pm
So I'm looking for better memory in the pi!
What do you even mean by that?

The memory in a Pi computer is fixed. It cannot be changed for a different type. The SoC has some on-board cache to speed things up, but that also cannot be upgraded. There is no "better memory" for the Pi. Each model comes with a fixed amount that is soldered to the SoC or system board. It's not a user upgradeable item.
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Re: RAM speed

Fri Jan 31, 2020 7:56 pm

HawaiianPi wrote:
Fri Jan 31, 2020 7:49 pm
bullen wrote:
Fri Jan 31, 2020 6:03 pm
So I'm looking for better memory in the pi!
What do you even mean by that?

The memory in a Pi computer is fixed. It cannot be changed for a different type. The SoC has some on-board cache to speed things up, but that also cannot be upgraded. There is no "better memory" for the Pi. Each model comes with a fixed amount that is soldered to the SoC or system board. It's not a user upgradeable item.
Yes...that's the other half of the situation. And to extend it...there is nothing on a Pi that is field upgradeable, at least not without professional grade equipment and extensive knowledge of how to use it. (i.e. in theory, someone with the requisite tools and materials could turn a 1GB Pi4B into a 4GB Pi4B, but it's not an amatuer effort and not cost effective in any case).

bullen
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Re: RAM speed

Fri Jan 31, 2020 8:40 pm

In general I think the automatic memory leveling needs to become programmatic, so that when you program you say what kind of memory you want:

L1int fast = 123;
L2int slower = 456;
LXint superslow... etc.

I specific I think the next iteration on pi's need to look at "very fast and very expensive Static RAM" in another way to work around bruteforce power by thinking smarter like Nintendo did in this case... You can't compete with Jetson Nano at equal terms you need to be smarter.

The only reason Nvidia is not releasing the 3D drivers for the Jetson is that their biggest customer would then get competition from the indie sceene. That will change eventually!

All in all I'm impressed by the performance of the pi 4... I mean >6x MHz on the memory is awesome!
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Re: RAM speed

Fri Jan 31, 2020 8:54 pm

bullen wrote:
Fri Jan 31, 2020 8:40 pm
I specific I think the next iteration on pi's need to look at "very fast and very expensive Static RAM" in another way to work around bruteforce power by thinking smarter like Nintendo did in this case... You can't compete with Jetson Nano at equal terms you need to be smarter.
That's not going to happen, ever.

What makes you think the Raspberry Pi Foundation is trying to compete with anyone? In case you haven't noticed, they are the leaders, they have sold more SBCs that anyone else by a huge margin. Everyone else is competing with them.

The foundation's primary goal is education, and any design consideration will be based on that. Price is a huge factor, so they won't be adding expensive features to satisfy a small niche market.
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Heater
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Re: RAM speed

Fri Jan 31, 2020 9:18 pm

bullen,

Have you ever programmed for machines where you the programmer had to manage what memory was where all the time, in your program, so as to extract maximum performance?

I have. Back in the days before there was even a PC. It was a royal pain in the butt.

Even on the PC in the days when memory maxed out at 640K Bytes one could write programs that used far more code and data space than that. It was done by using overlays. Effectively your disk drive was main memory and the RAM was cache, as described above.

That was also a royal pain in the butt.

It's kind of manageable when your program is the only program running on the machine. But that is not the case with modern operating systems as seen in Linux, Windows, Mac.

There is a reason why processors like the ARM on the Pi and everywhere else they are used and x86 etc have caches and virtual memory systems, all handled under the hood in the hardware and the operating system.

Comparison with the Jetson makes no sense. Essentially that is the same old ARM architecture as the Pi and your phone etc. All be it at various levels of transistor size and clock frequency etc. The Jetson's win is the integrated Nvidea GPU hardware which apparently outstrips the Pi's video core.
Memory in C++ is a leaky abstraction .

Technocolour
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Re: RAM speed

Fri Jan 31, 2020 9:38 pm

SRAM is pricey in the sense that it eats a lot of die space, that could have been spent on other things, like a bigger GPU.

But the only way I see SRAM comming to a future RPi with a new SoC, is if it's decided that it makes sense to include microcontrollers in the SoC. And then we're, at maximum, talking about one MB or so of it.

Special memory hierarchies aren't going to be a thing, aspecially with a SW staff of 15 or so people who needs to low level tune the code for it to pay off in a bigger sense (that wouldn't turn into bigger sales, anyhow).

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Re: RAM speed

Fri Jan 31, 2020 11:07 pm

Heater wrote:
Fri Jan 31, 2020 9:18 pm
Have you ever programmed for machines where you the programmer had to manage what memory was where all the time, in your program, so as to extract maximum performance?
About all we do routinely is to keep code and data small in the hope that it will fit in the cache, preferably the smaller/faster caches.
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Re: RAM speed

Fri Jan 31, 2020 11:17 pm

jahboater wrote:
Fri Jan 31, 2020 11:07 pm
Heater wrote:
Fri Jan 31, 2020 9:18 pm
Have you ever programmed for machines where you the programmer had to manage what memory was where all the time, in your program, so as to extract maximum performance?
About all we do routinely is to keep code and data small in the hope that it will fit in the cache, preferably the smaller/faster caches.
The formal programming directive is "locality of reference." That became an issue when virtual memory systems came in. Or as--I think it was Burroughs put it when the IBM DAT box systems came in: Today, IBM announces yesterday. (Burroughs had had virtual memory for about 10 years at that point.)

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Re: RAM speed

Fri Jan 31, 2020 11:23 pm

bullen wrote:
Fri Jan 31, 2020 8:40 pm
In general I think the automatic memory leveling needs to become programmatic, so that when you program you say what kind of memory you want:
Programmers do deal with that. The programmers that design microcode for the processors. It's a very narrow specialty.
I specific I think the next iteration on pi's need to look at "very fast and very expensive Static RAM" in another way to work around bruteforce power by thinking smarter like Nintendo did in this case... You can't compete with Jetson Nano at equal terms you need to be smarter.
Raspberry Pi: small cheap Single Board Computer. Even in your own request, you agree that SRAM is very expensive, so how do you expect to put any (outside of the SoC) on a $35 computer? I trust that you do realize that something as simple and inexpensive as a power switch has been omitted from Pis to shave down the cost? Where in the available BoM costs are you going to put SRAM?

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Re: RAM speed

Fri Jan 31, 2020 11:30 pm

SRAM is astronomically expensive. There is some in the GPU IIRC, for very fast line buffers. But its is SO expensive in die space that you use as little as possible to do the job required. Reducing die size is a major factor when designing chips - its a direct relationship to cost of the final product. Anything that makes them bigger is bad news.

That is all you really need to know.
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Heater
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Re: RAM speed

Fri Jan 31, 2020 11:42 pm

jahboater wrote:
Fri Jan 31, 2020 11:07 pm
About all we do routinely is to keep code and data small in the hope that it will fit in the cache, preferably the smaller/faster caches.
Not at all. Data is often big. Bigger than any caches one has. But still one can organize one's data layouts and order of processing to be cache friendly and achieve performance an order of magnitude faster than if one gets it wrong.

See for example this simple example from Intel about "loop blocking" https://software.intel.com/en-us/articl ... e-required.

This is why object oriented programming is a disaster for performance, scattering data around random memory allocations as it does. Game developers have exploited this knowledge for decades now.
Memory in C++ is a leaky abstraction .

Heater
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Re: RAM speed

Fri Jan 31, 2020 11:53 pm

Let's put aside the differences between speed, size, and cost of static RAM, dynamic RAM, whatever technology for a moment.

Entertain this thought:

1) We have an infinitely fast processor.

2) We have memory cells that take zero time to respond when they are addressed.

3) Memory cells still take up a non-zero volume of space.

That leaves us with the speed of light as the only limit on computational speed. Data that is further away will take longer to read and write. Just because of communication delays.

So we see that even at this extreme it will boost performance to cache the data you are working on nearby and process your whole data set in a cache friendly manner.

Cache's are fundamentally required by physics.
Memory in C++ is a leaky abstraction .

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Re: RAM speed

Fri Jan 31, 2020 11:58 pm

You have forgotten about the warp drive

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Re: RAM speed

Sat Feb 01, 2020 12:29 am

Heater wrote:
Fri Jan 31, 2020 11:53 pm
That leaves us with the speed of light as the only limit on computational speed. Data that is further away will take longer to read and write. Just because of communication delays.
It's actually worse than that. A signal in a wire travels at about c/2. (In coax--think wave guide--a signal travels about 0.8*c, but that's a tough way to do interconnects.) C works out to very close to 1 nanosecond per foot, so 6 inches of wire for that same nanosecond. The inverse of 1 nanosecond is 1GHz. Even Pis are now dealing with clock speeds in excess of 1.5GHz, so the farthest a signal can travel in one clock cycle in about 4 inches. If you have to get it back (and assuming no delay in the response), your down to 2 inches...which is smaller than the long dimension of the Pi PCB.

The fastest commercially available CPU know of off hand is an Intel chip that can run all cores at 5GHz. Now you're down to 2.4 in, one way, or 1.2 in if you need a round trip.

Many years ago, CPU ran synchronous clocks with external memory. That hasn't been the case for quite some time. DRAM is now considered to be an asynchronous external device because even if the clock speed could keep up with CPUs (it generally can't) the latency within the DRAM modules plus the time to get a signal there and back will keep the CPU twiddling its thumb waiting for a response. Hence on-chip SRAM cache.

A side effect of all this is that modern processors are fast in part because they are small. For those that recall the movie "Forbidden Planet", think about how abysmally *slow* the clock rate for the Krell Machine must have been! The size is given as 40 miles on a side, and "7800 levels". Total volume is given as 8,000 cubic miles.

bullen
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Re: RAM speed

Thu Oct 08, 2020 2:28 pm

Sorry to wake this one up, but latency of memory is going up with DDR5 (apparently DDR3 was faster than DDR4 too) so I found this page:

https://en.wikipedia.org/wiki/CAS_latency

I think my initial hunch about SRAM was right?

We need faster RAM, if not the raspberry 4 is peak CPU at 1 Gflops/watt, for ever, in the universe!?

Is the memory in the raspberry 4 3200MHz or 1600MHz? Or is it 1600, but at double rate?

Is there a way to measure CAS latency?

What nm process is the RAM?
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Heater
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Re: RAM speed

Thu Oct 08, 2020 3:00 pm

bullen wrote:
Thu Oct 08, 2020 2:28 pm
... latency of memory is going up with DDR5 (apparently DDR3 was faster than DDR4 too) ....
Where do you get that notion from? Any links to discussion of increased latency?

I read here: https://www.anandtech.com/show/16143/in ... -latencies that:
In terms of single access latency, we are ultimately not going to be any faster than we were by the end of the DDR3 era. DDR3-1866 at CL13 was already at 13.93 nanoseconds. This means that despite the increasing CAS latency values in clocks (going to CL46 at DDR5-6400), the actual single access latency is still roughly the same in real world time units.
bullen wrote:
Thu Oct 08, 2020 2:28 pm
We need faster RAM, if not the raspberry 4 is peak CPU at 1 Gflops/watt, for ever, in the universe!?
I need no such thing.

What makes you think faster RAM might not be on the cards already for whatever Pi model comes next?
bullen wrote:
Thu Oct 08, 2020 2:28 pm
Is there a way to measure CAS latency?
No idea.

I wonder how it would help? Given that there is a mass of cache memory between your code and data out in RAM.

Execution time of most programs is majorly determined by how "cache friendly" they are. That latency to actual RAM is hardly of any consequence.
Memory in C++ is a leaky abstraction .

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