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sakaki
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Re: RISC-V

Sun Jan 06, 2019 12:44 pm

Gavinmc42 wrote:
Sun Jan 06, 2019 6:12 am
Wow 13+ hour build, 2.6GB left of 32Gb - Gentoo64 OS.
"Nothing to be done..." Can I assume it's is all done?
Did you download and build the tools directly? Which commands, exactly, did you run (to download, configure, compile, install)?

Best, sakaki

mic_s
Posts: 92
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Re: RISC-V

Sun Jan 06, 2019 4:26 pm

jahboater wrote:These [Sifives board] look good (the "Unleashed") but at $999 for the board it seems pricey.
Especially as there is no license fee for the CPU's.
If you are satisfied with 2 RiscV64G cores (instead of 4) and Fmax some 400-700 Mhz there may be an low-cost alternative: K210. $5USD - $20USD, we are offtopic, so do your own research.
Gavinmc42 wrote:Will a RISC-V fit in 5300LUTs?
Basically: Yes, as demonstrated. An area-optimised core needs some 1000-2000 LUTs. There are discussions to integrate a hardcore RISCV32I in the fpga you mentioned.
Gavinmc42 wrote:SPI port on Pi, reset FPGA, reprogram the SPI flash, tristate the Pi SPI port, release reset, FPGA hat?
Yes. That is exactly what is done in UPduino v1.0
Gavinmc42 wrote:Wow 13+ hour build, 2.6GB left of 32Gb - Gentoo64 OS.
"Nothing to be done..." Can I assume it's is all done?
Gee what if I missed something and have to rebuild?
riscv-gnu-toolchain folder is 279645 files totally 12GB
Don't know what you are doing …
Ready to use pre-compiled toolchains for the RISC Vs:

(1) gnu-mcu-eclipse-riscv-none-gcc-8.1.0-2-20181019-0952-win64 for your embedded design takes some 2000 files and 500 MB.

(2) Sifive's freedom riscv64-unknown-elf-gcc-20181127-x86_64-w64-mingw32 takes under 5000 files
and 1.32 Gbyte.

(3) and a toolchain for NXPs RISC-V 32 („M1“, Vega board) is 1500 files, 1.2 GB

(4) another gcc toolchain (for an unnamed embedded RISC-V 32) is 2900 files, 600 MB

Or … in the llvm/clang space :
(5) Ashling's toolchain is 1700 files , 670 MB

All with a way way lower footprint as yours.
Where does your 12 GBytes / 279645 files in your toolchain come from ?
Can't see why raspbian makes such a great difference.

Heater
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Re: RISC-V

Sun Jan 06, 2019 4:45 pm

mic_s,

If you want a RISC V tool chain that runs on your Pi you need to build it yourself. Unless you know of a reliable source of ready made binary packages for Raspbian.

I suspect what Gavinmc42 has there now is thousands and thousands of intermediate build products, object files, once what is required is installed in /usr/local or where ever all of that can be deleted.
Memory in C++ is a leaky abstraction .

hippy
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Re: RISC-V

Sun Jan 06, 2019 4:56 pm

Heater wrote:
Sat Jan 05, 2019 8:42 pm
hippy,

That is a shame. What size SD do you have?
I thought it was 32GB but turns out it is 16GB. 13G total on /dev/root with over 8GB (68%) used. With 5GB free, the source download alone being 2GB, it never stood a chance.

Now back to 6GB (52%) used; over 2GB was being wasted by /etc/cache/apt.
Heater wrote:
Sat Jan 05, 2019 8:42 pm
I do sometimes wonder how much energy is wasted collectively through people having to build from source
You do wonder about the oddest things. A failed build on a Pi is a drop in the ocean, energy wise, compared to the energy us humans waste every day. Vanishingly insignificant.
You are probably right. I guess it just feels worse than it is, seeing how long it takes and considering many others are having to do similar when building from source, and not just RISC-V tools. The download pushed me over ISP capping limits so internet access slows down for a day, which also made it feel worse.
Heater wrote:
Sat Jan 05, 2019 8:42 pm
And why developers never create build scripts which check there's enough space before commencing a hefty build-driven download and having a long compilation eventually hit the wall.
To be fair I don't expect said developers are expecting people to be building things on such small machines.
Probably also right. For development use, disk space and lack of RAM are the two main areas where the Pi doesn't serve as a desktop replacement, where self-hosted builds aren't that desirable. If I ever do get round to figuring out how best to put my Pi in a 'proper box' I'll probably add a USB hard disk.

hippy
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Re: RISC-V

Sun Jan 06, 2019 5:21 pm

Gavinmc42 wrote:
Sun Jan 06, 2019 6:12 am
Now what do I do?
Depends where you want to go.

I would start compiling simple code to see what gets generated, while reading the RISC-V ISA definition, to get a better understanding of each.

Then there's playing with the other RISC-V tools; disassemblers, simulators, QEMU etc.

And writing your own tools. That's always a good way to get to grips with a new architecture. Starting by creating disassembler is my preferred course. A lightweight, small size, compiler for RISC-V would be welcomed by many :P

For 'real hardware'; fingers crossed RPT do come up with a RISC-V platform, otherwise it seems to be the HiFive1 or an FPGA solution. My preference would be the cheap UPduino 2.0 board.

Or, if you'd prefer kudos; you could set-up a web site serving up pre-built binary packages of tools for use with a Pi and Raspbian.

fruitoftheloom
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Re: RISC-V

Sun Jan 06, 2019 5:35 pm

hippy wrote:
Sun Jan 06, 2019 5:21 pm
Gavinmc42 wrote:
Sun Jan 06, 2019 6:12 am
Now what do I do?
Depends where you want to go.

I would start compiling simple code to see what gets generated, while reading the RISC-V ISA definition, to get a better understanding of each.

Then there's playing with the other RISC-V tools; disassemblers, simulators, QEMU etc.

And writing your own tools. That's always a good way to get to grips with a new architecture. Starting by creating disassembler is my preferred course. A lightweight, small size, compiler for RISC-V would be welcomed by many :P

For 'real hardware'; fingers crossed RPT do come up with a RISC-V platform, otherwise it seems to be the HiFive1 or an FPGA solution. My preference would be the cheap UPduino 2.0 board.

Or, if you'd prefer kudos; you could set-up a web site serving up pre-built binary packages of tools for use with a Pi and Raspbian.

https://www.analoglamb.com/product/dual ... yte-kd233/


https://wiki.debian.org/RISC-V


.
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Gavinmc42
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Re: RISC-V

Mon Jan 07, 2019 2:57 am

Did you download and build the tools directly? Which commands, exactly, did you run (to download, configure, compile, install)?
Sakaki, I just followed the RISC-V build all tools instructions, expecting it to break immediately.
What I did not expect was it to actually work and leave me with 280k odd files.
Of course that means all the tools are there to port Gentoo64 to RISC-V from a Pi?
Now who is crazy enough to try?

Plenty of Docker QEMU RISC-V stuff around but they seem to be Windows or Mac. I only have Linux at home :(
The problem I got was I ended up with the RISC-V Linux 32 and 64bit stuff as well, ie the whole kitchen sink.
I asked for everything and got it :lol:
Do I run Linux on RISC-V and compile for Linux or just do baremetal RISC-V?
If I ever do get round to figuring out how best to put my Pi in a 'proper box' I'll probably add a USB hard disk.
Exactly my thought last night, Pi Desktop with real SSD.
https://au.element14.com/element14/pi-d ... xcsku=true
(1) gnu-mcu-eclipse-riscv-none-gcc-8.1.0-2-20181019-0952-win64 for your embedded design takes some 2000 files and 500 MB.
GCC + Eclipse, no thanks, horrible memories.
I like exploring where no one has gone before ;) Bleeding edge technology.
Most of the time I follow early explorers, but sometimes I stumble off the path.

New CPUs needs new languages, new methods, the old ways are for Dinosaurs and corporates.
No need to use GCC, there are other options and languages.
Preferably one that does parallelism well.

Options 1-5 are all mainstream solutions. I want to use my Pi3B+s to develop( actually just hack and learn) at home.
500-600 MB is pretty normal, my work Window's Ultibo dev tools are around 1.37GB ~30,000 files.

Yep I'm a dinosaur and corporate too.
As for what all those 280k, 12.7GB files are for, no idea, each folder seems to have install.sh scripts.
Been a very long time since I did a full cross compile of GCC, version 3?
Will need to explore what I just made for myself, probably still has all the sources/object files etc?
I seem to remember a "clean" command that gets rid of unneeded stuff?

Can Pi's be used to do RISC-V GCC/Linux coding/compiling?
The answer is yes, it looks like they can.
Just like they can do Arm micros from Cortex M0 to A53's.
Next question, can Aarch64 cross compile for x86? :lol:

If someone wants to repeat this experiment on Raspbian use 32GB card and start with the Lite version?
Will 32bit Debian make a difference?

Warning, big compiles like this have been known to break SD cards on Pi's.
So I have been told, just passing the warning on, I probably got lucky, had a good card that was newish.
Time to go SSD plus rotating media? Fast network drive?

I can remember the good ole days of Pi's when 4GB even 2GB was enough :lol:
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rpdom
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Re: RISC-V

Mon Jan 07, 2019 7:27 am

Gavinmc42 wrote:
Mon Jan 07, 2019 2:57 am
I can remember the good ole days of Pi's when 4GB even 2GB was enough :lol:
8MB when I was doing my Bare Metal stuff on my first Pi :D
(Ok, I did the build on an x86 PC, but the 8MB SD card was plenty for the code I wrote)

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Gavinmc42
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Re: RISC-V

Mon Jan 07, 2019 7:53 am

Now I need a RISC-V to run any code on.

FPGA UP5K pcb , FPGA tools, will Icestudio compile on Aarch64?
Open Source FPGAs on Pi's with visual editor :o
Wow even Icehat's for Zero's now.
http://ebrombaugh.studionebula.com/embe ... index.html

RPF need to teach FPGAs to kids?

RISC-V? DIY cpus for kids?
Will a 6502 fit?
All those retro cpus, number of transistors = ? number of LUTs
https://en.wikipedia.org/wiki/Transistor_count.
RISC-V is 10,000 -20,000 transistors?
This FPGA could do a up to a Z80?

My ignorance is showing, time to learn, yet again.
What did we do before google?

[quote As HP Labs research scientist R. Stanley Williams recently observed, “The end of Moore’s Law could be the best thing that has happened in computing since the beginning of Moore’s Law. Confronting the end of an epoch should enable a new era of creativity.”][/quote]
Time to look outside the box?
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jamesh
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Re: RISC-V

Mon Jan 07, 2019 9:42 am

Just a update on this, I knew nothing about it (no change there!), asked around, and it's really just to keep an eye on the market, and make sure we are up to date with current technology and what's going on in the processor space.
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lost
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Re: RISC-V

Mon Jan 07, 2019 9:49 am

Heater wrote:
Fri Jan 04, 2019 6:58 pm
I did not understand Eben's statement that “We believe that instruction-set diversity is important,..." Because:

a) Instruction set diversity is a disaster. That implies a plethora of incompatible systems and a lot of work building tools for them all and porting software around, etc. That is why the modern world only has two instruction sets: Intel on PC and server, ARM on mobile and embedded.

b) It is the stated aim of the RISC V guys to be the one instruction set for everything.
a) This is not a disaster, as this may give a way to get out of x86 and ARM instruction sets that are clearly THE disaster for different reasons (compatibility burden + far too old design for one ; poor initial design that lead to now have at least 3 instruction sets, 2 32 bits for fixed and variable instruction size ones and 1 64 bits + maybe still some jazelle sometimes to make 4th... for th second arch).

At least, a very clean and intelligent design exists with the PowerPC, but never made it's way out of embedded (telecom, avionics, automotive) and server (IBM). Apple moving to x86 drove the 1st nail in the coffin and this architecture is currently loosing market shares (only IBM still develop it, with success but now only for it's own use). For this one, going from 32 to 64 bits was no big change because the instruction set was intelligent design.

So we still need diversity to get something better than dominant x86 and ARM, especially as they'll not fit for many applications (and that's not a crappy ISA problem abstracted by compilers for most users) for different reasons: With ME able to take-over the x86 anytime on one side and a simplified architecture plenty of undefined states on the other, there is now a need for a powerPC successor for automotive and avionics applications with heavy certification constraints, by next decade.

b) If a new ISA must emerge because PPC slowly dies, I think everyone will require it to be "free". Not device cost, implementation and manufacturing, of course (foundry will always cost a lot) but design. And there's also a need for a clean and predictable architecture left by PPC. Will one fit every needs? This could be, but diversity will IMO still be there to provide the right added values for manufacturers: Probably more on the hardware accelerators than in a central (and doing everything in SW) processor ISA.

To sum-up: This may be PPC if IBM change it's strategy to (re)fill the emerging gap (openPower may have been a shy an unsuccessful attempt, will they go further? As decision will be revenue driven, probably not). Otherwise this'll probably be RISC-V. But diversity will still be required, maybe more on SoC level than CPU cores, as use-cases for computer driven systems expands.
Last edited by lost on Mon Jan 07, 2019 9:59 am, edited 1 time in total.

jamesh
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Re: RISC-V

Mon Jan 07, 2019 9:59 am

lost wrote:
Mon Jan 07, 2019 9:49 am
Heater wrote:
Fri Jan 04, 2019 6:58 pm
I did not understand Eben's statement that “We believe that instruction-set diversity is important,..." Because:

a) Instruction set diversity is a disaster. That implies a plethora of incompatible systems and a lot of work building tools for them all and porting software around, etc. That is why the modern world only has two instruction sets: Intel on PC and server, ARM on mobile and embedded.

b) It is the stated aim of the RISC V guys to be the one instruction set for everything.
a) This is not a disaster, as this may give a way to get out of x86 and ARM instruction sets that are clearly THE disaster for different reasons (compatibility burden + far too old design for one ; poor initial design that lead to now have at least 3 instruction sets, 2 32 bits for fixed and variable instruction size ones and 1 64 bits + maybe still some jazelle sometimes to make 4th... for th second arch).

At least, a very clean and intelligent design exists with the PowerPC, but never made it's way out of embedded (telecom, avionics, automotive) and server (IBM). Apple moving to x86 drove the 1st nail in the coffin and this architecture is currently loosing market shares (only IBM still develop it, with success but now only for it's own use). For this one, going from 32 to 64 bits was no big change because the instruction set was intelligent design.

So we still need diversity to get something better than dominant x86 and ARM, especially as they'll not fit for many applications (and that's not a crappy ISA problem abstracted by compilers for most users) for different reasons: With ME able to take-over the x86 anytime on one side and a simplified architecture plenty of undefined states on the other, there is now a need for a powerPC successor for automotive and avionics applications with heavy certification constraints, by next decade.

b) If a new ISA must emerge because PPC slowly dies, I think everyone will require it to be "free". Not device cost, implementation and manufacturing, of course (foundry will always cost a lot) but design. And there's also a need for a clean and predictable architecture left by PPC. Will one fit every needs? This could be, but diversity will IMO still be there to provide the right added values for manufacturers: Probably more on the hardware accelerators than in a central (and doing everything in SW) processor ISA.

To sum-up: This may be PPC if IBM change it's strategy to (re)fill the emerging gap. Otherwise this'll probably be RISC-V. But diversity will still be required, maybe more on SoC level than CPU cores, as use-cases for computer driven systems expands.
Just out of interest, what are the applications where x86 or ARM do not fit? Is it just automotive, and in which case, why don't x86 or ARM fit these use cases?
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lost
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Re: RISC-V

Mon Jan 07, 2019 10:24 am

jamesh wrote:
Mon Jan 07, 2019 9:59 am
Just out of interest, what are the applications where x86 or ARM do not fit? Is it just automotive, and in which case, why don't x86 or ARM fit these use cases?
If you want to give fun to Airbus engineers involved in fly-by-wire, just propose a design with another computer working in their back and able to preempt most hardware... or an architecture with thousands of matches searching for "undefined" in the documentation. And automotive industry have some similar constraints.

This is why they now face a problem: Telecom industry that have debugged generations of PowerPC processors last 2 decades turns more and more to cloud (thus server based designs) is no more doing the job and also driving initial commercial profitability for the critical software business second life of these processors.

As they have very long design cycles, they must figure-out now what they will use in 10 years.

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Re: RISC-V

Mon Jan 07, 2019 11:11 am

lost wrote:
Mon Jan 07, 2019 10:24 am
jamesh wrote:
Mon Jan 07, 2019 9:59 am
Just out of interest, what are the applications where x86 or ARM do not fit? Is it just automotive, and in which case, why don't x86 or ARM fit these use cases?
If you want to give fun to Airbus engineers involved in fly-by-wire, just propose a design with another computer working in their back and able to preempt most hardware... or an architecture with thousands of matches searching for "undefined" in the documentation. And automotive industry have some similar constraints.

This is why they now face a problem: Telecom industry that have debugged generations of PowerPC processors last 2 decades turns more and more to cloud (thus server based designs) is no more doing the job and also driving initial commercial profitability for the critical software business second life of these processors.

As they have very long design cycles, they must figure-out now what they will use in 10 years.
Sounds like Airbus/any safety critical users need to design their own chips if PPC falls by the wayside, and RISC-V will likely be a good option. Its much easier to design your own stuff nowadays (although still not cheap).

Always worth remembering that this stuff is very niche, as in, sales are low compared with x86 or ARM, so comparing with ARM or x86 space is a bit apples and oranges.
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Gavinmc42
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Re: RISC-V

Mon Jan 07, 2019 11:19 am

Just out of interest, what are the applications where x86 or ARM do not fit?
Probably pretty small market, at the moment. 99.99999% are versions of these two?
Well any safety critical stuff, aircraft/space/transport using x86/ARM?
Is there a radiation hardened RISC-V for space, how long to qualify it?

Big AI/NN/ML server stuff moving to Multicore, FPGA, GPU/TPU/?PU
For IoT - low power x86's probably not? Plenty of CortexM0-7's and others for that.

Since we cannot go much faster in CPU speed (in silicon), go sideways.
Send out explorers in every direction.
What other ways can computing be done?
For robots, FPGAs on every motor and sensor with self learning movements/feedback.
Distributed processing.

What can be done with a bunch of UL640 16pin FPGAs?
Mark Tilden's BEAM robots are just some transistors/hex/octal buffers but they could learn to walk.
Ant like behavior goes back before Rodney Brooks
https://en.wikipedia.org/wiki/Rodney_Brooks
Over time there's been a realization that vision, sound-processing, and early language are maybe the keys to how our brain is organized.

That Lattice UPDuino kit has vision and audio sensors :D
It can do FFT's, but I think ??CLEP might be better.
To get the best out of hardware it must be known, RISC-V is known, especially if you roll your own.

Can all this unknown territory be explored using Pi's?
Probably quite a lot of it, who knows unless we go out and have a look around.

Anyone know how to solder 16pin WLCSP chips by hand?
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lost
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Re: RISC-V

Mon Jan 07, 2019 12:20 pm

jamesh wrote:
Mon Jan 07, 2019 11:11 am
Always worth remembering that this stuff is very niche, as in, sales are low compared with x86 or ARM, so comparing with ARM or x86 space is a bit apples and oranges.
Your question was indeed "why x86/ARM" does not do the job in critical SW applications, not epsilon market shares (for now).

For this last subject, when such computer system is certified, design cannot change + design cycles are so long that obsolescence management must be carefully managed from the very beginning: So provisions are made for whole BOM according to production forecasts (& if you underestimate, you'll have to go with those happy few small companies buying/storing masks able to restart batches for you, even using some very old processes not even more taught at school... the price hurts, but most of the time orders of magnitude less than a re-design/certification!).

PowerPC was a well designed and very scalable architecture that will be missed and nature hates vacuums. Intel is reluctant to give support (+ documentation is a shame) you if you don't have a market able to compete with PC (+ lack of confidence after seeing them stopping attempts to go on the mobile or IoT businesses), and ARM does not fit for anything critical, a niche but growing market (spoke about planes, but similar constraints for cars, medical...). So I think you're wrong with current market shares: We're at the corner for CPU architectures and this happens now.

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Re: RISC-V

Mon Jan 07, 2019 12:25 pm

Heater wrote:
Fri Jan 04, 2019 6:58 pm
andrum99,
...it would seem on the face of it to be a strange thing to do...
It does not seem strange to me. It seems natural. Because:

1) RISC V is already a big thing. Nvidia will be using it as a system controller in their new graphics chips. Western Digital will be using it in their future storage product controllers. There are many others getting on with RISC V based developments.

2) I could well imagine that Broadcom, makers of our Pi SoCs, is looking seriously at RISC V.

3) Down the road from Pi Head Quarters in Cambridge the LowRisc guys are developing a RISC V SoC.

4) ARM, the processor design used in the Pi now belongs to SoftBank.

5) It's already two years ago or so that I posted my future Pi "pink pony" wish that it would be RISC V based.

OK, scratch that last point, it's just my personal Unicorn.

Having said that, I don't expect a RISC V based Raspberry Pi any time soon.

I did not understand Eben's statement that “We believe that instruction-set diversity is important,..." Because:

a) Instruction set diversity is a disaster. That implies a plethora of incompatible systems and a lot of work building tools for them all and porting software around, etc. That is why the modern world only has two instruction sets: Intel on PC and server, ARM on mobile and embedded.

b) It is the stated aim of the RISC V guys to be the one instruction set for everything.

Anyway, interesting news.
OK no there is intel and amd! for desktop/laptop/server and arm does have a competitor qualcoms snapdragon oh yeah and the chinese phone company who has bean banned a lot of places and I can't spell
I do strange things and am sometimes the techhead stereotype.
deal with it!

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Re: RISC-V

Mon Jan 07, 2019 12:45 pm

lost wrote:
Mon Jan 07, 2019 12:20 pm
jamesh wrote:
Mon Jan 07, 2019 11:11 am
Always worth remembering that this stuff is very niche, as in, sales are low compared with x86 or ARM, so comparing with ARM or x86 space is a bit apples and oranges.
Your question was indeed "why x86/ARM" does not do the job in critical SW applications, not epsilon market shares (for now).

For this last subject, when such computer system is certified, design cannot change + design cycles are so long that obsolescence management must be carefully managed from the very beginning: So provisions are made for whole BOM according to production forecasts (& if you underestimate, you'll have to go with those happy few small companies buying/storing masks able to restart batches for you, even using some very old processes not even more taught at school... the price hurts, but most of the time orders of magnitude less than a re-design/certification!).

PowerPC was a well designed and very scalable architecture that will be missed and nature hates vacuums. Intel is reluctant to give support (+ documentation is a shame) you if you don't have a market able to compete with PC (+ lack of confidence after seeing them stopping attempts to go on the mobile or IoT businesses), and ARM does not fit for anything critical, a niche but growing market (spoke about planes, but similar constraints for cars, medical...). So I think you're wrong with current market shares: We're at the corner for CPU architectures and this happens now.
I think you might be overestimating the amount of safety critical stuff, but I am not sure of your exact point. The huge majority of tasks are happy with either ARM or x86 - desktops, tablets, phones, washing machines, TV's, IoT etc etc etc.

As I said, looks like the best options for safety might be custom CPU designs, perhaps based on RISC-V. Long lead times and long service lives require custom solutions. Seems that mainstream manufacturers are simply not interested (as you say, Intel are reluctant), because the sales volumes pale compared with everything else.

But, with something like RISC-V there is a standard, modern, royalty free design that you can design your own CPU's from. Might even be a market opportunity for a company to get something designed and certified.
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Heater
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Re: RISC-V

Mon Jan 07, 2019 1:01 pm

jamesh,
Just out of interest, what are the applications where x86 or ARM do not fit?
How about these:

1) Nvidia adopting RISC V for the management processor in their GPU's. That is huge.

2) Western digital adopting RISC V for the controller in their storage products. An estimated billion chips per year.

3) A ton of smaller companies with ideas. It's impossible to license Intel it's expensive and time consuming to negotiate an ARM license. For example: https://www.cnx-software.com/2018/10/19 ... ve-vision/

4) Academia. It's better all academic research and student tuition is done with open systems. RISC V is taking off big time in that space. When those students graduate into the real world they will bring RISC V with them.

5) Me. I want a processor in my FPGA experiments. What better than I can create my own from the ISA spec and get to use all the RISC V tools?

In general it's clear: If you want a custom core to do a job, Intel is not even a candidate, ARM is time consuming and expensive license away.

Think of it like the arrival of Linux into the closed source operating system world. See where that is today. See where RISC V could be soon.
Memory in C++ is a leaky abstraction .

Heater
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Re: RISC-V

Mon Jan 07, 2019 1:15 pm

lost,
This is not a disaster,...
You read me wrong. Or I was not clear enough.

I did not say RISC V was a disaster. Quite the opposite. I love the RISC V idea and totally embrace it.

I said instruction set diversity is a disaster. I also said "It is the stated aim of the RISC V guys to be the one instruction set for everything."

I was puzzling how Eben seems to have got the wrong end of the stick here. The RISC V idea is not ISA diversity. It is to unify everything to the one open standard ISA.

Of course Eben has to be diplomatic, given that he works for Broadcom, which is heavily invested in ARM.
Memory in C++ is a leaky abstraction .

jamesh
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Re: RISC-V

Mon Jan 07, 2019 2:22 pm

Heater wrote:
Mon Jan 07, 2019 1:01 pm
jamesh,
Just out of interest, what are the applications where x86 or ARM do not fit?
How about these:

1) Nvidia adopting RISC V for the management processor in their GPU's. That is huge.
Huge, but ARM fits in to this space. The question was what spaces do ARM and x86 NOT fit in.
Heater wrote:
Mon Jan 07, 2019 1:01 pm
2) Western digital adopting RISC V for the controller in their storage products. An estimated billion chips per year.
Ditto
Heater wrote:
Mon Jan 07, 2019 1:01 pm
3) A ton of smaller companies with ideas. It's impossible to license Intel it's expensive and time consuming to negotiate an ARM license. For example: https://www.cnx-software.com/2018/10/19 ... ve-vision/
Possible, but developing your own chip is expensive, which is why people buy ARM
Heater wrote:
Mon Jan 07, 2019 1:01 pm

4) Academia. It's better all academic research and student tuition is done with open systems. RISC V is taking off big time in that space. When those students graduate into the real world they will bring RISC V with them.
Academia could get by perfectly fine with ARM or x86. So what is it about RISC-V makes it better than those two.
Heater wrote:
Mon Jan 07, 2019 1:01 pm

5) Me. I want a processor in my FPGA experiments. What better than I can create my own from the ISA spec and get to use all the RISC V tools?

In general it's clear: If you want a custom core to do a job, Intel is not even a candidate, ARM is time consuming and expensive license away.

Think of it like the arrival of Linux into the closed source operating system world. See where that is today. See where RISC V could be soon.
You are wearing a delightful shade of rose tinted specs.

It'll take time. Longer than "soon".
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mic_s
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Re: RISC-V

Mon Jan 07, 2019 2:47 pm

Heater wrote:Of course Eben has to be diplomatic, given that he works for Broadcom, which is heavily invested in ARM
.Why not both ?

Western digital (a big player, no question) is with ARM and with RISC-V. We will see RTL of there RV32IMC SweRV in a view weeks. Public. On github: https://github.com/westerndigitalcorporation/swerv (currently empty)

Or NXP (no question, also a big player) is (as everyone) with arm and additionaly with RISCV : e.g RV32M1-with 2 riscV pulp cores ( RI5CY and Zero-RI5CY). A limited Number of there VEGA-boards are given away for free.

Even BCM is (besides different arm cores) additionally also with MIPS (e.g. BCM33843,BCM3380, …).
.

Heater
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Re: RISC-V

Mon Jan 07, 2019 2:52 pm

jamesh,
Huge, but ARM fits in to this space [Nvidia].
Presumably it does not. You would have to ask Nvidia why not. They explain it clearly enough at the presentations at the RISC V conferences. See, youtube: https://www.youtube.com/watch?v=gg1lISJfJI0
Ditto[Western Digital]
Presumably it does not. You would have to ask Western Digital why not. They explain it clearly enough at the presentations at the RISC V conferences. See, youtube: https://www.youtube.com/watch?v=JlIhU_vovP0
Possible, but developing your own chip is expensive, which is why people buy ARM
Traditionally that is true.

With open source cores like RISC V Rocket and Boom that removes all the CPU development cost. With common tool chains that removes a lot of the software cost of doing your own thing. With the likes of SciFive streamlining the trip from idea to chip that brings the cost down a lot.
Academia could get by perfectly fine with ARM or x86
No. They cannot. I'll leave it to the likes of David Patterson and Krste Asanović at Berkeley to explain why not.
You are wearing a delightful shade of rose tinted specs.
Perhaps. However I was right when I saw the writing on the walls when I discovered Linux in 1998.
It'll take time. Longer than "soon".
Soon is now for many. See Kendryte K210 for example. Or Nvidia or Western Digital etc...

I agree with you that RISC V is not about to displace Intel in general purpose PC's and servers. RISC V is not about to displace ARM in mobile overnight. Although I suspect that is more likely. But it does open up a huge other world.

I guess that is why the Raspberry Pi Foundation signed up with the RISC V Foundation, so you guys get to catch up with what is going on here :)
Memory in C++ is a leaky abstraction .

Heater
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Re: RISC-V

Mon Jan 07, 2019 3:07 pm

mic_s,
Why not both ?
Why not indeed. I'm sure that if Broadcom saw a need for RISC V in some product or other they would go for it.

Broadcom may well be looking into it. Perhaps they already have development going on. Who would know.

Eben, being a Broadcom employee, cannot let such information out willy-nilly. He has to be diplomatic.

As far as I can tell the ARM core(s) in the Raspberry Pi are a tiny part of the silicon and they were an add on to an existing video core chip and that was all done it a pretty short time.

I conclude that for Broadcom swapping out ARM for RISC V on the Pi or more likely adopting it for future Pi SoCs would be almost trivial.
Memory in C++ is a leaky abstraction .

jamesh
Raspberry Pi Engineer & Forum Moderator
Raspberry Pi Engineer & Forum Moderator
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Re: RISC-V

Mon Jan 07, 2019 3:19 pm

Heater wrote:
Mon Jan 07, 2019 2:52 pm
jamesh,
Huge, but ARM fits in to this space [Nvidia].
Presumably it does not. You would have to ask Nvidia why not. They explain it clearly enough at the presentations at the RISC V conferences. See, youtube: https://www.youtube.com/watch?v=gg1lISJfJI0
Ditto[Western Digital]
Presumably it does not. You would have to ask Western Digital why not. They explain it clearly enough at the presentations at the RISC V conferences. See, youtube: https://www.youtube.com/watch?v=JlIhU_vovP0
Possible, but developing your own chip is expensive, which is why people buy ARM
Traditionally that is true.

With open source cores like RISC V Rocket and Boom that removes all the CPU development cost. With common tool chains that removes a lot of the software cost of doing your own thing. With the likes of SciFive streamlining the trip from idea to chip that brings the cost down a lot.
Academia could get by perfectly fine with ARM or x86
No. They cannot. I'll leave it to the likes of David Patterson and Krste Asanović at Berkeley to explain why not.
You are wearing a delightful shade of rose tinted specs.
Perhaps. However I was right when I saw the writing on the walls when I discovered Linux in 1998.
It'll take time. Longer than "soon".
Soon is now for many. See Kendryte K210 for example. Or Nvidia or Western Digital etc...

I agree with you that RISC V is not about to displace Intel in general purpose PC's and servers. RISC V is not about to displace ARM in mobile overnight. Although I suspect that is more likely. But it does open up a huge other world.

I guess that is why the Raspberry Pi Foundation signed up with the RISC V Foundation, so you guys get to catch up with what is going on here :)
I stated why we signed up above.

Presumption makes an ass of u and me. Nvidia/Western digital have used ARM in the past, so clearly it fits in their spaces. My thoughts are that they have moved a small amount of design work to RISC-V 1) to see how well it works 2) Because it moves them away from the pay ARM model so they think it might be cheaper in the long run. Not because ARM doesn't work, but because they MIGHT have found a cheaper option. Time will tell whether the choice is correct. There are lots of extra places where you need to spend money when you move away from the traditional suppliers.

My question of above was for use cases where ARM/x86 DONT work, not where there *might* be a cheaper option. That is a different question.
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