andrum99
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RISC-V

Fri Jan 04, 2019 6:09 pm

I note from twitter that Raspberry Pi has joined the RISC-V Foundation as a silver member. RISC-V is an instruction set architecture. This does make me wonder whether future models of Pi will be based on RISC-V rather than ARM: it would seem on the face of it to be a strange thing to do. Perhaps Raspberry Pi would care to comment?

fruitoftheloom
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Re: RISC-V

Fri Jan 04, 2019 6:20 pm

andrum99 wrote:
Fri Jan 04, 2019 6:09 pm
I note from twitter that Raspberry Pi has joined the RISC-V Foundation as a silver member. RISC-V is an instruction set architecture. This does make me wonder whether future models of Pi will be based on RISC-V rather than ARM: it would seem on the face of it to be a strange thing to do. Perhaps Raspberry Pi would care to comment?
https://abopen.com/news/raspberry-pi-fo ... embership/
The Raspberry Pi Foundation has announced its membership of the RISC-V Foundation at the Silver Member tier, offering support for the instruction set architecture on a software – though not yet hardware – level.
“This isn’t a product announcement,” explains Eben. “We believe that instruction-set diversity is important, that open, free instruction set architectures are an important enabler for innovation, and there’s a lot of exciting work going on in the RISC-V community at the moment.
adieu

Asus CS10 Chromebit / HP Envy 4500 Wireless Printer / Raspberry Pi Model 2B v1.1 / RealVNC Software...

Heater
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Re: RISC-V

Fri Jan 04, 2019 6:58 pm

andrum99,
...it would seem on the face of it to be a strange thing to do...
It does not seem strange to me. It seems natural. Because:

1) RISC V is already a big thing. Nvidia will be using it as a system controller in their new graphics chips. Western Digital will be using it in their future storage product controllers. There are many others getting on with RISC V based developments.

2) I could well imagine that Broadcom, makers of our Pi SoCs, is looking seriously at RISC V.

3) Down the road from Pi Head Quarters in Cambridge the LowRisc guys are developing a RISC V SoC.

4) ARM, the processor design used in the Pi now belongs to SoftBank.

5) It's already two years ago or so that I posted my future Pi "pink pony" wish that it would be RISC V based.

OK, scratch that last point, it's just my personal Unicorn.

Having said that, I don't expect a RISC V based Raspberry Pi any time soon.

I did not understand Eben's statement that “We believe that instruction-set diversity is important,..." Because:

a) Instruction set diversity is a disaster. That implies a plethora of incompatible systems and a lot of work building tools for them all and porting software around, etc. That is why the modern world only has two instruction sets: Intel on PC and server, ARM on mobile and embedded.

b) It is the stated aim of the RISC V guys to be the one instruction set for everything.

Anyway, interesting news.

jahboater
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Re: RISC-V

Fri Jan 04, 2019 9:12 pm

FYI the user level ISA spec is here:-
https://riscv.org/specifications/

Heater
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Re: RISC-V

Fri Jan 04, 2019 9:57 pm

I wonder what "offering support for the [RISC V] instruction set architecture on a software – though not yet hardware – level." means.

Will we see GCC for RISC V and other tools available as packages in Raspbian? What about RISC V simulators and so on?

That would be great.

hippy
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Re: RISC-V

Fri Jan 04, 2019 11:31 pm

andrum99 wrote:
Fri Jan 04, 2019 6:09 pm
This does make me wonder whether future models of Pi will be based on RISC-V rather than ARM:
It wouldn't surprise me. It's the next big thing, the Foundation would seem ideally placed to deliver a low-cost SBC product which would take RISC-V mainstream while securing a competitive edge over the competition. I wouldn't expect an immediate replacement of the Pi; perhaps a parallel product ?

We'll have to wait and see.

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Gavinmc42
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Re: RISC-V

Sat Jan 05, 2019 10:32 am

The problem (or fun, depending on your viewpoint) with Pi's is the secret sauce in the blob, codecs etcs.
A RISC-V board say $5-10 mark, is still useful for teaching the Mission.

Developing for RISC-V on Pi's?
Who knows, some kid doing that may end up designing the Pi9 :D

The BBC microbit is a bit more limited, a RISC-V board would fit between the Microbit and Pi's?
I'm dancing on Rainbows.
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jahboater
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Re: RISC-V

Sat Jan 05, 2019 11:28 am

Heater wrote:
Fri Jan 04, 2019 9:57 pm
Will we see GCC for RISC V and other tools available as packages in Raspbian?
GCC already supports RISC-V on the Pi according to the man page:

Code: Select all

RISC-V Options 
   -mbranch-cost=N-instruction -mplt  -mno-plt -mabi=ABI-string -mfdiv
   -mno-fdiv -mdiv  -mno-div -march=ISA-string -mtune=processor-string
   -mpreferred-stack-boundary=num -msmall-data-limit=N-bytes -msave-restore
   -mno-save-restore -mstrict-align -mno-strict-align -mcmodel=medlow -mcmodel=medany
   -mexplicit-relocs  -mno-explicit-relocs -mrelax -mno-relax

hippy
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Re: RISC-V

Sat Jan 05, 2019 12:14 pm

Gavinmc42 wrote:
Sat Jan 05, 2019 10:32 am
The BBC microbit is a bit more limited, a RISC-V board would fit between the Microbit and Pi's?
RISC-V is mostly an instruction set specification, with some basic rules as to what any particular implementation based on that must include to be called a RISC-V device.

Its primary advantage is that the instruction set is free for use by all. So there's no threat of corporate lawyers arriving at your doorstep if you adopt it and use it, no license fees or rights issues if one chooses to use the RISC-V instruction set.

Consequentially, adopting RISC-V saves people designing chips from having to invent their own optimal instruction sets, avoids the costs of that and having to develop tools for the chip from the ground up. Tools for RISC-V software development already exist though chips with proprietary extensions may need proprietary versions of those tools.

How any specific RISC-V chip is implemented is up to the developers of that chip. It could be a small and slow 4-leg chip implementing the minimum of instructions through to a multi-GHz BGA behemoth with multiple cores, supporting every instruction, custom extensions, and more.

How it's packaged, what on-chip peripherals and external buses are supported, is also down to the designer of that chip.

Likewise the board it's on and how powerful, useful or capable, a particular RISC-V product would be, would depend on which RISC-V chip were used and what the board designer provided for.

So RISC-V should span from "far simpler than a micro:bit" to "better than a Pi", potentially all the way up to "as good as anything else on the market".

It doesn't necessarily mean an entirely open RISC-V world. Implementers are free to add their own secret sauce, undocumented instruction extensions and peripherals, and deliver the code for those as binary blobs. Companies can still sell implementations and designs to others who don't want to do it themselves. Implementations and designs don't need to be public nor open.

The only restriction is that a license is required for commercial products to use the "RISC-V" trademark and that is granted to members of the RISC-V foundation.

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Gavinmc42
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Re: RISC-V

Sat Jan 05, 2019 12:53 pm

Busy installing the RISC-V tools on my Gentoo64 Pi.
Had a low around while waiting for install and found this
https://www.lowrisc.org/about/

This time I noticed this
Our open-source SoC (System-on-a-Chip) designs will be based on the 64-bit RISC-V instruction set architecture. Volume silicon manufacture is planned as is a low-cost development board.
64bit yippee, er wonder if Sony has spare capacity?

I assume this L-C Dev Board will be silicon and not FPGA based?
Aarch64 based FPGA tools?
Rust cross compiling on aarch64 for RISC-V?
So much to learn.

How close is OpenGPU?, version 2?

Looks like "make" gcc for RISC-V is making.
Try making RustC, GoLang and Free Pascal cross compilers next.
Need some hardware to test these on :(

Wow, gcc takes ages to make.
Time to sleep and hope it does not break.
I'm dancing on Rainbows.
Raspberries are not Apples or Oranges

Heater
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Re: RISC-V

Sat Jan 05, 2019 1:26 pm

GCC on Raspbian, or anywhere else may well have RISC V options, that does not mean it can actually generate RISC V code.

However I understand that RISC V is a fully supported target for GCC now. There is also a Debian for RISC V. What's missing here is a RISC V cross-compiler that runs on the Pi as a Raspbian package.

RISC V is only an instruction set architecture specification. Anyone can implement it however they like. But if you want to call your product RISC V then you need to be a member of the RISC V Foundation and your processor has to pass their compliance tests.

Hippy is right, anyone could make a RISC V. Could be a closed source design. Could be mixed in with all kind of other closed source blobs on a SoC. Like the Pi's ARM is.

Gavinmc42,
How close is OpenGPU?, version 2?
No idea. I imagined, a year or so back, that Broadcom could adopt the RISC V in a Pi like SoC. They could even use an open source RISC V design, but they could also include their closed video technology on there.

Now, who knows what is going on? I'm sure we won't find out until something is cooked up...

jahboater
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Re: RISC-V

Sat Jan 05, 2019 1:46 pm

Heater wrote:
Sat Jan 05, 2019 1:26 pm
What's missing here is a RISC V cross-compiler that runs on the Pi as a Raspbian package.
That must be easy enough to make yourself. Just work out what to give for some of these.
--target=
--host=
--build=
--with-cpu=
--with-fpu=

Some examples:-

Aarch64 config is simple:-
../configure --enable-languages=c,c++ --with-cpu=cortex-a53

ARM 32 bit is fiddly:-
../configure --enable-languages=c,c++ --with-cpu=cortex-a53 \
--with-fpu=neon-fp-armv8 --with-float=hard --build=arm-linux-gnueabihf \
--host=arm-linux-gnueabihf --target=arm-linux-gnueabihf

Intel x64 is very simple:-
../configure --enable-languages=c,c++ --disable-multilib

See also:-
https://github.com/riscv/riscv-gnu-toolchain

Heater
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Re: RISC-V

Sat Jan 05, 2019 2:13 pm

I have never tried build the RISC V tool chain on a Pi but on a PC it's been very easy for a year or two now:

I use the instructions that Clifford Wolf has on his picorv32 repository: https://github.com/cliffordwolf/picorv32 so as to get the correct libs built for my RISC V FPGA experiments.

hippy
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Re: RISC-V

Sat Jan 05, 2019 2:32 pm

Heater wrote:
Fri Jan 04, 2019 6:58 pm
3) Down the road from Pi Head Quarters in Cambridge the LowRisc guys are developing a RISC V SoC.
Founded by at least two people who have been involved with Raspberry Pi and their articles of association ensure their assets transfer to RPF should they cease to be.

Becoming a RISC-V foundation member may indicate some sort of growing relationship or partnership with Lowrisc. As said; we'll have to wait and see. Maybe this year's 'anniversary surprise' will be a RISC-V HAT ?
Heater wrote:
Sat Jan 05, 2019 2:13 pm
I use the instructions that Clifford Wolf has on his picorv32 repository: https://github.com/cliffordwolf/picorv32
I knocked-up a RISC-V emulator in Python over Christmas to get familiar with the ISA and need a compiler to produce code to test it against. So thanks for that.

Heater
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Re: RISC-V

Sat Jan 05, 2019 2:55 pm

Sounds like a great Christmas project.

As my Easter project of 2018 I wrote my RISC V emulator in Scala. It uses the SpinalHDL library so it generates Verilog which is then run using the Verilator. Verilator translates Verilog to C which can then be run as an emulation for testing.

https://github.com/ZiCog/sodor-spinal

So far it decodes and executes all base integer RISC V instructions. It does not actually run a fetch execute cycle yet. It's been languishing a while.

Hopefully my RISC V will make it into an FPGA at some point. Perhaps this years Easter project...

hippy
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Re: RISC-V

Sat Jan 05, 2019 8:08 pm

hippy wrote:
Sat Jan 05, 2019 2:32 pm
https://github.com/cliffordwolf/picorv32
thanks for that.
Unfortunately, after leaving it running on my Pi while I tootled off to do the shopping, I came home to find I am 'out of space on my SD Card' and it unsurprisingly hasn't built successfully :(

Another case where having a suitable pre-built package available, which could be installed with a simple apt-get install, would help.

I do sometimes wonder how much energy is wasted collectively through people having to build from source. And why developers never create build scripts which check there's enough space before commencing a hefty build-driven download and having a long compilation eventually hit the wall.
Gavinmc42 wrote:
Sat Jan 05, 2019 12:53 pm
Busy installing the RISC-V tools on my Gentoo64 Pi.
Wow, gcc takes ages to make.
Time to sleep and hope it does not break.
If it does succeed; please can you let me/us know how much disk space it has taken up. And what magic incantations you used to get it built.

andrum99
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Re: RISC-V

Sat Jan 05, 2019 8:28 pm

By "strange thing to do" I meant that it seems a little odd to move from ARM. It also occurred to me that it would be odd to join the RISC-V Foundation if you weren't going to use RISC-V in a product. We will just need to wait and see.

Heater
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Re: RISC-V

Sat Jan 05, 2019 8:42 pm

hippy,

That is a shame. What size SD do you have?
Another case where having a suitable pre-built package available, which could be installed with a simple apt-get install, would help.
That is what I am hoping for when Eben speaks of software support for the RISC V.
I do sometimes wonder how much energy is wasted collectively through people having to build from source
You do wonder about the oddest things. A failed build on a Pi is a drop in the ocean, energy wise, compared to the energy us humans waste every day. Vanishingly insignificant.
And why developers never create build scripts which check there's enough space before commencing a hefty build-driven download and having a long compilation eventually hit the wall.
To be fair I don't expect said developers are expecting people to be building things on such small machines.

jahboater
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Re: RISC-V

Sat Jan 05, 2019 8:46 pm

hippy wrote:
Sat Jan 05, 2019 8:08 pm
I do sometimes wonder how much energy is wasted collectively through people having to build from source.
Less than one might think.
The build is done once, but the program is run many times.
Hopefully the program is built specifically for the target machine, so it should run faster.
For example, I presume the apps in the Pi repo are built for ARMv6, yet most people are using ARMv8.

Heater
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Re: RISC-V

Sat Jan 05, 2019 8:56 pm

andrum99,
By "strange thing to do" I meant that it seems a little odd to move from ARM.
Certainly it would be a monumentally big decision to move away from ARM if you have working and successful ARM based products, requiring a huge effort and expense. It would take a lot to justify it.

There are some attractions though:

1) No more royalty payments to ARM for each unit shipped.

2) If you want to add your own magic to the processor it's easier.

3) You get to decide your road map for future processors not ARM.

Apple designs it's own processors. They use the ARM ISA so they still have to pay ARM. Seems a bit silly but they have money enough to do it. I could well imagine Apple switching to RISC V. They have the expertise to do it and they have an amazing track record of switching architectures, Motorola 68000 to PowerPC to Intel.
It also occurred to me that it would be odd to join the RISC-V Foundation if you weren't going to use RISC-V in a product. We will just need to wait and see.
Yes, something is afoot...

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Gavinmc42
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Re: RISC-V

Sun Jan 06, 2019 1:26 am

Busy installing the RISC-V tools on my Gentoo64 Pi.
Wow, gcc takes ages to make.
Time to sleep and hope it does not break.

If it does succeed; please can you let me/us know how much disk space it has taken up. And what magic incantations you used to get it built.
Coming up to a 12hour build with 5.8GB left of my Gentoo64 32GB Sandisk A1 uSD.
No idea how much longer before it finishes or crashes.
Just followed the instructions here, picked the multiarch , 32 and 64 bit compiler
https://riscv.org/software-tools/risc-v ... toolchain/
I do sometimes wonder how much energy is wasted collectively through people having to build from source.
Hey, it's not the energy, it is what left of my life going down the "C" hole.
To be fair I don't expect said developers are expecting people to be building things on such small machines.
Hey, Pi's are not toy computers ;) they are serious computing hardware that 10 years ago would have been top line... ;)
It was just a test by me to see if a Pi could do serious stuff like become a complete development system for the next generation of hardware.
It was also a test to see how easy it was to get the tool set working for new hardware.

The last time I compiled GCC I think I only had a single core PC.
As a curiosity check I did a hard drive scan and found 23 versions of GCC for the various microcontrollers/IDEs etc I used back then.
When Pi's came along I tried every other language over C, well just because I could ;)

I am not the first to complain about GCC's self compile time, that's one of the main reasons Rust, Go, Free Pascal come about.
I hope you guys don't mind but this just reconfirmed something for me - GCC is still a pain.
If I get a real RISVC-V hardware I will be using Rust, Go or Free Pascal compilers, not C or C++.

Came across a nice Rust baremetal tutorial for Pi's, wonder how hard to get it going on RISC-V.
https://github.com/rust-embedded/rust-raspi3-tutorial

A credit is due to everyone behind GCC/Pi/Gentoo64, it is still compiling the RISC-V cross compiler complete suite on Aarch64 on a Pi3B+.
The only thing that could stop it is a power cut or uSDcard space running out.
Lucky I used my only big massive 32GB uSD, but I think I might need something bigger?

While waiting I did find out about the Libre RISC-V with the OpenGPU using LLVM, Rust,Kazan to do Vulkan.
Quad core RV64 RISC-V with Vulkan Graphics, yes please.

Also got curious about FPGA RISC-V, discovered Xilinx's ACAP thing, dual A72 ARMs plus 2 x R5 plus lots of interesting stuff.

People cannot longer throw CPU speed at problems.
How to train the next gen of coders or will they grow up multicore/thread, cpu, AI, ML, NN aware?
A single core 32bit RISC-V SBC might not be enough to teach them?
How much of the future is coloured by our past?

How long till a quad core RISC-V is running Redox OS with Vulkan graphics?
First step - port Redox to Pi3B+
Next - build Rustc for RISC-V on Aarch64

Hey if it works, how do I test RISC-V C compiling on my Gentoo64 box?
Is there a QEMU for RISC-V on Aarch64?
Don't tell me, QEMU is written in C? :lol:

4.9GB left of 32GB, will be running into swap soon?
"Granddad, I heard in the old days there was this big, slow, mean, bloated language called C that made grown men cry, is it true?"
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Raspberries are not Apples or Oranges

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Gavinmc42
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Re: RISC-V

Sun Jan 06, 2019 6:12 am

Wow 13+ hour build, 2.6GB left of 32Gb - Gentoo64 OS.
"Nothing to be done..." Can I assume it's is all done?
Gee what if I missed something and have to rebuild?
riscv-gnu-toolchain folder is 279645 files totally 12GB :D

Now what do I do?
I'm dancing on Rainbows.
Raspberries are not Apples or Oranges

Heater
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Re: RISC-V

Sun Jan 06, 2019 11:45 am

Gavinmc42,
Hey, Pi's are not toy computers ;) they are serious computing hardware that 10 years ago would have been top line... ;)
I did not mean to imply they were.

You remind me that in 2002 or so I was running Gentoo on my awesome 100MHz AMD 486 with a gigantic 1GB Quantum Bigfoot hard drive. I often built kernels and GCC and in fact the entire system from sources on that machine.
Now what do I do?
Hmm... Now that you have a RISC V tool chain you obviously need a RISC V to run it's products on.

Perhaps real hardware like the HiFive: https://www.sifive.com/boards

Perhaps emulation using qemu or Spike. Personally I would go for writing ones own RISC V emulator.

Perhaps a RISC V core in FPGA. There are many HDL designs around now. I use Clifford Wolf's picorv32 on a DE0-nano board.

If you went for a Lattice ICE40 based board then you could use the Open Source YoSys tools to do the FPGA synthesis: http://www.clifford.at/yosys/

Of course you will need to get Yosys running on the Pi first....

jahboater
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Re: RISC-V

Sun Jan 06, 2019 12:22 pm

Heater wrote:
Sun Jan 06, 2019 11:45 am
Perhaps real hardware like the HiFive: https://www.sifive.com/boards
These look good (the "Unleashed") but at $999 for the board it seems pricey.
Especially as there is no license fee for the CPU's.
Heater wrote:
Sun Jan 06, 2019 11:45 am
Personally I would go for writing ones own RISC V emulator.
Starts to look attractive. You would learn the ISA quickly!

Can you just emulate RV64G and avoid all the system/privileged stuff?
Last edited by jahboater on Sun Jan 06, 2019 12:30 pm, edited 2 times in total.

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Gavinmc42
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Re: RISC-V

Sun Jan 06, 2019 12:27 pm

$999 early adopter price or RISC-V fan boys only.
Linux RISC-V, gee is that the only use it can be used for?
Hey, Pi's are not toy computers ;) they are serious computing hardware that 10 years ago would have been top line... ;)
Sorry I was channeling Jamesh or was it 6by9? ;)

That UPduino v2.0 with the Himax camera is the sort of stuff that interests me.
DSP multipliers, hmmm fuzzy logic, NN engine, lots of things.
Will a RISC-V fit in 5300LUTs?
Interesting hardware in the FPGA, wish it was in friendly soldering package.

OpenOCD on Pi can program flash, do I need the FTDI FT232H?
SPI port on Pi, reset FPGA, reprogram the SPI flash, tristate the Pi SPI port, release reset, FPGA hat?
Only about $9 AUD for the chip, a Zero is cheaper :lol:

Where do I find the time to learn it?
I'm dancing on Rainbows.
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