Raspberry Pi Forums

Yes. Or fluxion-condenser.

All I want shutdown button
but I don't mind faster CPU and bigger RAM

r3d4 wrote: ho well then the name not so important as long as a biomass powerd pi in on the wish list its all good !

That's old tech. It's not quite biomass, but I've seen a RPi powered with a hydrogen fuel cell.

tony power wrote:All I want shutdown button
but I don't mind faster CPU and bigger RAM

Buy this: http://www.uugear.com/product/witty-pi- ... pberry-pi/ for eleven quid and you'll get your shutdown button and a lot more besides.

DougieLawson wrote:

r3d4 wrote: ho well then the name not so important as long as a biomass powerd pi in on the wish list its all good !

That's old tech. It's not quite biomass, but I've seen a RPi powered with a hydrogen fuel cell.

Yea i saw that but ...IDK how they re-fule that cell ?
.... i guess im just daydreaming about the 'overunity / zpe' version so i can take it on the road / offgrid

Heater wrote:Yes. Or fluxion-condenser.

A *Newtonian* fluxion condenser.

tony power wrote:All I want shutdown button
but I don't mind faster CPU and bigger RAM

Depends on what you mean by a "shutdown button". Shutdown and power off are different functions to a Linux system (or any computer, really). There is a "shutdown button" on the desktop of Raspbian. For a power off switch, try https://www.adafruit.com/products/2379 .

leiptrstormr wrote:I haven't even checked to see who they used for their wifi and bluetooth hardware.

It's a Broadcom chip. The specific device was mentioned in the launch blog.

Heater wrote:You cannot market a "flux-capacitor". The owners of the movie will set their attack lawyers on to you. Dave Jones recently had this problem just using the phrase "flux-capacitor" on a tee shirt he was selling.

I am going to put (solder) flux on all the (SMD) capacitors in my parts bin in solidarity with Dave.

r3d4 wrote:

DougieLawson wrote: That's old tech. It's not quite biomass, but I've seen a RPi powered with a hydrogen fuel cell.

Yea i saw that but ...IDK how they re-fule that cell ?
.... i guess im just daydreaming about the 'overunity / zpe' version so i can take it on the road / offgrid

It's recharged by electrolysing H2O. The oxygen is bled off to the atmosphere. The hydrogen is stored in metal hydride (in a Hydrostik). A full Hydrostik weighs just 0.9g more than an empty one.
http://www.horizonfuelcell.com/

W. H. Heydt wrote: Shutdown and power off are different functions to a Linux system (or any computer, really).

There is no difference between shutdown and poweroff on the Pi as it can't shut it's power off. poweroff is better (IMHO) as it doesn't need any switches and just does what it says on the tin

The Zero+ could use a USB-c connector for both power and a USB connection. I am working on projects with a 3. The Zero could replace the 3 after development. I can add a powered USB 3 hub with one port providing power and another port proving the data connection. A USB-c connection would remove the need for two USB sockets.

What could you do with the space left by fitting only one USB port? The free space should be big enough to store some anti matter to drive a teleportation port. This would make it easier to service a remote installation of a Raspberry Pi.

W. H. Heydt

A *Newtonian* fluxion condenser.

I did not know there was any other kind of fluxion.

asandford wrote:

W. H. Heydt wrote: Shutdown and power off are different functions to a Linux system (or any computer, really).

There is no difference between shutdown and poweroff on the Pi as it can't shut it's power off. poweroff is better (IMHO) as it doesn't need any switches and just does what it says on the tin

I beg to differ. Shutdown is a termination of processes and an orderly cessation of activity. Power off is the removal of electrical power to the system. Now, I will grant you that there are machines that can, as a final step of shutdown signal the power regulation or PSU to drop power, but they're still distinct functions and mistaking one for the other can lead to file system corruption.

My top four are:

1) 28nm or better to allow higher SoC clock speed for better PC replacement experience

2) hardware accelerated videos in browser (preferably Chrome) without jumping through hoops like omxplayer

3) dedicated gigabit ethernet not shared with USB bus

4) starting 2GB DRAM

Don't mind paying more for the hardware additions. Perhaps for long term planning use ARM Mali GPU.

peterlite wrote:The Zero+ could use a USB-c connector for both power and a USB connection. I am working on projects with a 3. The Zero could replace the 3 after development. I can add a powered USB 3 hub with one port providing power and another port proving the data connection. A USB-c connection would remove the need for two USB sockets.

You can already power the Zero via the data USB. However there is no data connection on the power USB.

mi7chy wrote:My top four are:

1) 28nm or better to allow higher SoC clock speed for better PC replacement experience

2) hardware accelerated videos in browser (preferably Chrome) without jumping through hoops like omxplayer

3) dedicated gigabit ethernet not shared with USB bus

4) starting 2GB DRAM

Don't mind paying more for the hardware additions. Perhaps for long term planning use ARM Mali GPU.

1. Needs support from the SOC supplier, and a LOT of money. (>$5M perhaps - complete chip respin including the VC4)
2. Software issue, not HW. I think it has been demonstrated somewhere.
3. There are ways of doing this, but need dedicated or custom HW, again not cheap. ($2M?)
4. Cost, and needs a change to the SoC memory controller system, which isn't going to be cheap ($1M)

Note all costs very approximate.

3.14 TB HDD
52" OLED display.

- Low power suspend mode

Any pi uses > 70ma at all times, even after "shutdown" - which limits battery applications.

0xFF wrote:3.14 TB HDD
52" OLED display.

Surely 31.4" is better?

A good analog to digital converter. Someway to sample an analog input with DMA using precise timer based sampling rates. In other words give the system some DSP capabilities.

jamesh wrote: 1. Needs support from the SOC supplier, and a LOT of money. (>$5M perhaps - complete chip respin including the VC4)
2. Software issue, not HW. I think it has been demonstrated somewhere.
3. There are ways of doing this, but need dedicated or custom HW, again not cheap. ($2M?)
4. Cost, and needs a change to the SoC memory controller system, which isn't going to be cheap ($1M)

Note all costs very approximate.

I hope the RPi foundation can figure it out because it could mean taking over the world and replacing Apple as a household name vs being a niche. And, with wider adoption the cost can be spread out over mass production. RPi3 is getting closer but still hasn't hit the sweet spot as far as user experience.

mi7chy wrote:

jamesh wrote: 1. Needs support from the SOC supplier, and a LOT of money. (>$5M perhaps - complete chip respin including the VC4)
2. Software issue, not HW. I think it has been demonstrated somewhere.
3. There are ways of doing this, but need dedicated or custom HW, again not cheap. ($2M?)
4. Cost, and needs a change to the SoC memory controller system, which isn't going to be cheap ($1M)

Note all costs very approximate.

I hope the RPi foundation can figure it out because it could mean taking over the world and replacing Apple as a household name vs being a niche. And, with wider adoption the cost can be spread out over mass production. RPi3 is getting closer but still hasn't hit the sweet spot as far as user experience.

What do they need to sort out again? They are the biggest selling SBC by far, and their target market seems very well served. There's nothing wrong with being a niche product, and the RPF certainly are not looking to take on APple - its a different market completely.

mi7chy,

I hope the RPi foundation can figure it out because it could mean taking over the world and replacing Apple as a household name vs being a niche.

Where did you get the bizarre idea that charitable organization with an educational mission should be aiming to usurp Apple, or anyone else, as a supplier of general purpose computers and mobile phones?

And, with wider adoption the cost can be spread out over mass production. RPi3 is getting closer but still hasn't hit the sweet spot as far as user experience.

What is wrong with the "user experience". You turn it on, you are immediately encouraged to start programming it. Almost exactly as intended.

Given time, we could find that with the ever vanishing cost of hardware and increasing amount of Free and Open Source software in the world the likes of Apple cannot sell anything any more. I think that day is far away.

jamesh wrote:

mi7chy wrote:My top four are:

1) 28nm or better to allow higher SoC clock speed for better PC replacement experience

2) hardware accelerated videos in browser (preferably Chrome) without jumping through hoops like omxplayer

3) dedicated gigabit ethernet not shared with USB bus

4) starting 2GB DRAM

Don't mind paying more for the hardware additions. Perhaps for long term planning use ARM Mali GPU.

1. Needs support from the SOC supplier, and a LOT of money. (>$5M perhaps - complete chip respin including the VC4)
2. Software issue, not HW. I think it has been demonstrated somewhere.
3. There are ways of doing this, but need dedicated or custom HW, again not cheap. ($2M?)
4. Cost, and needs a change to the SoC memory controller system, which isn't going to be cheap ($1M)

Note all costs very approximate.

1. Broadcom is going to have to do that anyway. The thermal issues with the Pi3B show that 40nm has pretty much run its course.
3. I'm not going to argue that you're wrong about cost, but the issue could be side stepped by putting USB 3.1 (10Gb/s) on the SoC, but only USB 3.0 (5Gb/s) on the port side of a LAN chip and explicitly dedicating bandwidth to the Ethernet connection. (Note that this is neither a prediction, nor something I would actually ask for.)
4. There are enough other things that are likely to drive VC4 advances that this is probably a minor issue. The move in the direction of 4K video is probably the big one. When the memory controller is reworked--may as well while shifting to 28nm--it should get at least 32 address lines. Going to 40 address lines would be very clever, even if some of them aren't even brought out as far as the BGA initially.