gregeric wrote: fruitoftheloom wrote:
Heater wrote:I was wondering about the networking over USB idea. There is a slight chance that using PPP over the UARTs may be a bit quicker. One is not shoveling all data through the same interface.
Did you mean my post regards USBNET which I undertook as proof of concept:
There are other USB 2.0 high speed (480 Mbit/sec) host-to-host link products available too, with data transfer speeds that comfortably break 100BaseT speed limits. A single USB 2.0 link should handle even full duplex 100BaseT switches (100 MBit/sec in each direction) with capacity to spare, and more capable EHCI controllers should handle several such links.
Most definitely not, cos Heater was speculating whether separate serial PPP may be quicker than shoving everything via that single crippled USB.
Max serial speed over an older UART is typically 115,200 bps if you're talking to something like an Arduino or a PC serial port due to clock crystal stability (how closely does it remain to its rated center frequency over time vs. temperature, humidity, vibration, etc.). The latest UARTs can get up to around 1 Mbps, but all of this is highly dependent on the quality of the signal, which is determined by many factors including cable length/conductor gauge/shielding, signal voltage level, induced noise (RS-232 is single line and therefore not very noise-tolerant, as opposed to differential signals over two lines with simultaneous opposing polarities like RS-422, USB, Firewire, etc.), clock crystal stability, impedance matching, black helicopter and alien transmissions, etc.
There's an interesting thread at viewtopic.php?f=44&t=17559
where Gert (who designed that part of the SoC) notes that the theoretical maximum speed of the GPIO ports is upwards of 100 MHz each, but someone in that thread found about a 4 Mbps limit in OS level code and it wasn't clear how that limit could be changed without totally screwing up timing of all of the other protocols such as SPI, I2C, etc. Gert noted that there are only four phased-lock loops (PLLs) in the hardware that all clock signals have to divide down in order to get other frequencies that would correspond to canonical data rates. However, if two Pii are communicating, the specific data rates are unimportant after all other factors are optimized.
I2C is practically limited to about 3.2 Mbps due to its single-line nature, but SPI, with its control lines, has a much higher upper limit, with 100 Mbps theoretically possible, depending on the hardware interface (some devices are limited to as little as about 6 Mbps). There's that 4 MBps OS limit, but whatever the max speed is on a single Pi GPIO SPI connection, multiple SPI connections can be established via software setup, with the maximum number of simultaneous possible connections depending on whether 26-pin or 40-pin GPIO ports are available between the Pii.
I find that I have to keep reminding everyone that quoted data rates, including for USB, are all _theoretical_instantaneous_upper_limits_ that are _never_ achieved in the Real World, and far from it. So, although the theoretical instantaneous speed of USB 2.0 is 480 Mbps, due to cable lengths/conductor gauge/shielding quality/connector wear or corrosion/etc., whether cables are kept straight, bent, or coiled, the presence of potential interfering RF signals, etc., the actual "goodput" (a real telecom technical term for a number less than theoretical "throughput" that takes these kinds of real world factors into account through actual measurement) can easily be only 10% of the theoretical maximum. Couple that limit with the fact that the Pi's single shared bus for USB, Ethernet, etc., is a significant chokepoint, and your USB port isn't nearly as fast as you might think. If you have any other USB peripherals connected, the goodput drops even further.
As they say, Your Mileage May Vary, Batteries not included, Objects in Mirror Are Closer Than They Appear, Do Not Spindle, Fold, or Mutilate ...