slado
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Access to GPIO pins on HAT

Mon Aug 04, 2014 7:35 am

Hi,

is there any requirement for a HAT that the GPIO pins must stay accessible after attaching the HAT to the RPi B+ ?
The HAT will contain two big supercapacitors. The position of these supercapacitors on the HAT PCB will probably make it more difficult to access the new GPIO pins (27 to 40). Will the board be still HAT compliant?

For better understanding here is the RPi B version of the HAT board:

http://youtu.be/4TL4QYm4x0k

Regards
Slado

usul27
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Re: Access to GPIO pins on HAT

Wed Aug 06, 2014 1:08 pm

In my understanding there is no requirement for GPIO pass-trough, if this is what you mean. But somebody from the RPI foundation should confirm this.

Best regards
Daniel

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mahjongg
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Re: Access to GPIO pins on HAT

Wed Aug 06, 2014 1:18 pm

HAT boards are not stackable, so normally do not pass through the header pins, but for specific applications I don't see why you would not pass the pins through. However if you expect other boards to be stacked on top, in principle you then should not use any GPIO pins as it would block the stacked board from using that same I/O pin. HATs in principle do not support stacking.

Also, a board can only be called a HAT if:
  1. It conforms to the basic add-on board requirements
  2. It has a valid ID EEPROM (including vendor info, GPIO map and valid device tree information).
  3. It has a full size 40 Pin GPIO connector.
  4. It follows the HAT mechanical spcification
  5. It uses a GPIO connector that spaces the HAT between 10mm and 12mm from the Pi (i.e. uses spacers between 10mm and 12mm).
  6. If back powering via the GPIO connector the HAT must be able to supply a minimum of 1.3A continuously to the Pi (but ability to supply 2A continuously recommended).
more technical info about HAT specs are here: https://github.com/raspberrypi/hats

PiGraham
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Re: Access to GPIO pins on HAT

Wed Aug 06, 2014 3:34 pm

mahjongg wrote:However if you expect other boards to be stacked on top, in principle you then should not use any GPIO pins as it would block the stacked board from using that same I/O pin. HATs in principle do not support stacking.
The HAT spec may not support stacking, but stacking add-on boards does allow GPIO pins to be used on the stacked boards. That's the point of a system of stacking add-ons. It requires some scheme to avoid conflicts between boards over which GPIO they use. It complicates things, but is certainly possible. Any I2C device can share those pins, and may use configurable addressing. SPI devices can share SPI pins but listen to one or other CE line. Various devices might share GPIO for some common feature across multiple boards (e.g. a interrupt line, reset or synchronising clock).

Academic for HATs, since the HAT spec is out.

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AndrewS
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Re: Access to GPIO pins on HAT

Wed Aug 06, 2014 3:39 pm

Stacking Hardware Attached (on) Top doesn't make for such a great acronym either :lol:

PiGraham
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Re: Access to GPIO pins on HAT

Wed Aug 06, 2014 3:47 pm

AndrewS wrote:Stacking Hardware Attached (on) Top doesn't make for such a great acronym either :lol:
:lol:

It could be HATS - Stacking Hardware Attached (on) Top- Stackable

There is surely an opening for a Raspberry Beret among all the Hats, Shields and Capes.

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AndrewS
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Re: Access to GPIO pins on HAT

Wed Aug 06, 2014 3:51 pm

PiGraham wrote:There is surely an opening for a Raspberry Beret among all the Hats, Shields and Capes.
Completely LOusy AKronym ;)

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mahjongg
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Re: Access to GPIO pins on HAT

Wed Aug 06, 2014 6:56 pm

I'm calling a board stacked on top of a HAT a TOP, and the combination a TOP-HAT.

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AndrewS
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Re: Access to GPIO pins on HAT

Wed Aug 06, 2014 7:01 pm

Tower Of Power? ;)

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Paul Webster
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Re: Access to GPIO pins on HAT

Wed Aug 06, 2014 9:39 pm

mahjongg wrote:I'm calling a board stacked on top of a HAT a TOP, and the combination a TOP-HAT.
I'd vote for that ... oh hang on I did already ;)

http://www.raspberrypi.org/forums/viewt ... 99#p584199

slado
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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 5:42 am

mahjongg wrote:HAT boards are not stackable, so normally do not pass through the header pins, but for specific applications I don't see why you would not pass the pins through. However if you expect other boards to be stacked on top, in principle you then should not use any GPIO pins as it would block the stacked board from using that same I/O pin. HATs in principle do not support stacking.

Also, a board can only be called a HAT if:
  1. It conforms to the basic add-on board requirements
  2. It has a valid ID EEPROM (including vendor info, GPIO map and valid device tree information).
  3. It has a full size 40 Pin GPIO connector.
  4. It follows the HAT mechanical spcification
  5. It uses a GPIO connector that spaces the HAT between 10mm and 12mm from the Pi (i.e. uses spacers between 10mm and 12mm).
  6. If back powering via the GPIO connector the HAT must be able to supply a minimum of 1.3A continuously to the Pi (but ability to supply 2A continuously recommended).
more technical info about HAT specs are here: https://github.com/raspberrypi/hats

What is the requirement for minimum current of 1.3A continuosly good for?
The Raspberry Pi B+ draws less than 300mA. I could understand this requirement for a peak value but why continuosly?
Is that for the peripheral devices attached to the 4 USB ports? Then you probably don't cover the worst case and you need even more current specified.

BMS Doug
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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 8:06 am

slado wrote: What is the requirement for minimum current of 1.3A continuosly good for?
The Raspberry Pi B+ draws less than 300mA. I could understand this requirement for a peak value but why continuosly?
Is that for the peripheral devices attached to the 4 USB ports? Then you probably don't cover the worst case and you need even more current specified.
Perhaps its a median case, it certainly allows for keyboard, mouse and Wifi or Bluetooth dongle, which should be the most common usage needs.
Doug.
Building Management Systems Engineer.

slado
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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 10:42 am

BMS Doug wrote:
slado wrote: What is the requirement for minimum current of 1.3A continuosly good for?
The Raspberry Pi B+ draws less than 300mA. I could understand this requirement for a peak value but why continuosly?
Is that for the peripheral devices attached to the 4 USB ports? Then you probably don't cover the worst case and you need even more current specified.
Perhaps its a median case, it certainly allows for keyboard, mouse and Wifi or Bluetooth dongle, which should be the most common usage needs.
Wouldn't it be wiser NOT to define ANY value for minimum continuous current for back powering via GPIO connector? Otherwise you disqualify many applications not using keyboards, mouses and Wifi/Bluetooth dongles. The idea of creating a HAT standard makes sense but it should be open enough to cover the majority of applications.
Just defining a minimum current value does not solve the problem with reliable operation. I bet even a 2A power supply will operate unreliable when there will be a few meters of thin cable between the power supply and the Raspberry Pi. Or when there will be an 'exotic' type of peripheral device drawing high current peaks attached to the Raspberry Pi. The problem is more complicated and would require a complicated specification, too. In this case is better not specify anything.

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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 12:41 pm

BMS Doug wrote:
slado wrote: What is the requirement for minimum current of 1.3A continuosly good for?
The Raspberry Pi B+ draws less than 300mA. I could understand this requirement for a peak value but why continuosly?
Is that for the peripheral devices attached to the 4 USB ports? Then you probably don't cover the worst case and you need even more current specified.
Perhaps its a median case, it certainly allows for keyboard, mouse and Wifi or Bluetooth dongle, which should be the most common usage needs.
...and the camera board, which is relatively power-hungry. And obviously the power drawn by the SoC will fluctuate depending on exactly what the CPU and GPU are doing. There's a thread with detailed power measurements floating around somewhere...

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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 12:44 pm

slado wrote:Wouldn't it be wiser NOT to define ANY value for minimum continuous current for back powering via GPIO connector? Otherwise you disqualify many applications not using keyboards, mouses and Wifi/Bluetooth dongles.
If you want to provide less than the recommended minimum current then that's totally fine, you simply can't call your addon board a HAT.

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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 2:23 pm

AndrewS wrote:
slado wrote:Wouldn't it be wiser NOT to define ANY value for minimum continuous current for back powering via GPIO connector? Otherwise you disqualify many applications not using keyboards, mouses and Wifi/Bluetooth dongles.
If you want to provide less than the recommended minimum current then that's totally fine, you simply can't call your addon board a HAT.
Agreed, you do not need to build your boards to the HAT standard, you can build any Sub-Hat Implementation Technique that you desire.
Doug.
Building Management Systems Engineer.

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AndrewS
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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 2:41 pm

BMS Doug wrote:Agreed, you do not need to build your boards to the HAT standard, you can build any Sub-Hat Implementation Technique that you desire.
:lol: :D :lol:

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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 3:09 pm

slado wrote:
BMS Doug wrote:
slado wrote:Wouldn't it be wiser NOT to define ANY value for minimum continuous current for back powering via GPIO connector? Otherwise you disqualify many applications not using keyboards, mouses and Wifi/Bluetooth dongles. The idea of creating a HAT standard makes sense but it should be open enough to cover the majority of applications.
It does cover the majority. Specifying a minimum current ensures that a back=powering HAT will support the majority os application, mice, wifi, external HD etc, as well as the standard Pi B+. It doesn't 'disqualify many applications'.

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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 3:58 pm

BMS Doug wrote:
Agreed, you do not need to build your boards to the HAT standard, you can build any Sub-Hat Implementation Technique that you desire.
Is there a Sub-Hat Implementation Technique Extended option available?
Criticising any questions is banned on this forum.

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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 3:59 pm

PiGraham wrote:
slado wrote:
slado wrote:Wouldn't it be wiser NOT to define ANY value for minimum continuous current for back powering via GPIO connector? Otherwise you disqualify many applications not using keyboards, mouses and Wifi/Bluetooth dongles. The idea of creating a HAT standard makes sense but it should be open enough to cover the majority of applications.
It does cover the majority. Specifying a minimum current ensures that a back=powering HAT will support the majority os application, mice, wifi, external HD etc, as well as the standard Pi B+. It doesn't 'disqualify many applications'.
I think that Slado's point was that someone may want to put together a Pi + HAT for a specific application with no additional peripherals and the requirement that the HAT have a continuous supply rating over and above that needed for the Pi alone would mean that the HAT power supply is over-engineered for the required task (and therefore more expensive).
Doug.
Building Management Systems Engineer.

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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 4:07 pm

BMS Doug wrote:I think that Slado's point was that someone may want to put together a Pi + HAT for a specific application with no additional peripherals and the requirement that the HAT have a continuous supply rating over and above that needed for the Pi alone would mean that the HAT power supply is over-engineered for the required task (and therefore more expensive).
And as I said, they can do that, but they just won't be able to call their board a HAT.

I believe the intention behind the HAT spec is to create a uniform standard, so that the user can just plug on any HAT board they like and expect it to "just work". Obviously if it's a "special HAT" with only a lower-rated PSU (which may not power all the peripherals they've got plugged into their Pi), then that "just works" assumption gets broken :?

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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 4:11 pm

DougieLawson wrote:Is there a Sub-Hat Implementation Technique Extended option available?
I'm looking forward to the Sub-Hat Implementation Technique Extended Fully Equipped (with) Special Testpoints :)

slado
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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 6:12 pm

BMS Doug wrote: I think that Slado's point was that someone may want to put together a Pi + HAT for a specific application with no additional peripherals and the requirement that the HAT have a continuous supply rating over and above that needed for the Pi alone would mean that the HAT power supply is over-engineered for the required task (and therefore more expensive).

Yes, this is the point! The other point is: There are so many different peripheral devices from so many manufactures. You will never have control over their power consumption needs. By defining a certain current value you just try to define a safety margin for the majority of cases, but the current value is not the only important thing that will ensure proper operation. There are also things like impedance values of the cable (length, diameter), impedance values in the load and in the source (capacitors), shape of current (bursts or continuous?, burst time, peak current...) etc.
And when you don't have control over something, how can you create a standard for it and why do you want to create it? What would be the added value of such definition?

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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 6:47 pm

slado wrote:And when you don't have control over something, how can you create a standard for it and why do you want to create it? What would be the added value of such definition?
It's the same as any standard, like USB 2.0, The point is to define certain minimum requirement that must be met so that users will know that complient devices will just work. USB specs define minimum current requirements.

A HAT doesn't need any active power supply circuitry, it can simply provide thick enough tracks to route the external supply current to the GPIO header. The spec requires that you don't make that connection with a skinny track that can't handle the current.
Last edited by PiGraham on Fri Aug 08, 2014 7:55 pm, edited 1 time in total.

slado
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Re: Access to GPIO pins on HAT

Fri Aug 08, 2014 7:46 pm

PiGraham wrote:
slado wrote:And when you don't have control over something, how can you create a standard for it and why do you want to create it? What would be the added value of such definition?
It's the same as any standard, like USB 2.0, The point is to define certain minimum requirement that must be met so that users will know that complient devices will just work. USB specs define minimum current requirements.

A HAT doesn't need any active power supply circuitry, it can simply provide thick enough tracks to route the external supply current to the GPIO header. The spec requires that you don't make that connection with a skinny track that can't handle the current.

Yes, you are right. The USB specs define minimum current requirements. But besides that they define also the cables, the connectors, the front-ends of the circuits, the impedances etc.
That is far more than just a current value definition. A very complex standard with thousands of man-hours of work. The users know that USB will work. If there was just the current defined USB would never work properly.

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