dislick
Posts: 10
Joined: Mon Oct 24, 2016 9:35 am

SPI: Chip Enable 0 doesn't work

Mon Jan 15, 2018 2:47 pm

Hello!

We are trying to get the SPI interface on the Compute Module 3 to work. The default pins 7-11 work as expected. However due to a piece of hardware we designed are we forced to use pins 35-39. According to this PDF file on page 102 this shouldn't be an issue:
https://www.raspberrypi.org/app/uploads ... herals.pdf

Well, they don't work as we were expecting them to. The Chip Enable (CE0 and CE1) pins aren't outputting anything. This has been observed with two different Compute Modules on the Development Board and on our own hardware.

Here are two photos of the oscilloscope we attached to the official Development Board:

Channel 1, yellow: SCLK
Channel 2, blue: MOSI
Channel 3, pink: CE1
Channel 4, green: CE0

Working on pins 7-11
Image

No chip enable on pins 35-39:
Image

To change the pins functions we used the "raspi-gpio" tool. Here is the output of the command "raspi-gpio get":

Code: Select all

BANK0 (GPIO 0 to 27):
GPIO 0: level=1 fsel=0 func=INPUT
GPIO 1: level=1 fsel=0 func=INPUT
GPIO 2: level=1 fsel=0 func=INPUT
GPIO 3: level=1 fsel=0 func=INPUT
GPIO 4: level=1 fsel=0 func=INPUT
GPIO 5: level=1 fsel=0 func=INPUT
GPIO 6: level=1 fsel=0 func=INPUT
GPIO 7: level=1 fsel=0 func=INPUT
GPIO 8: level=1 fsel=0 func=INPUT
GPIO 9: level=0 fsel=0 func=INPUT
GPIO 10: level=0 fsel=0 func=INPUT
GPIO 11: level=0 fsel=0 func=INPUT
GPIO 12: level=0 fsel=0 func=INPUT
GPIO 13: level=0 fsel=0 func=INPUT
GPIO 14: level=1 fsel=4 alt=0 func=TXD0
GPIO 15: level=1 fsel=4 alt=0 func=RXD0
GPIO 16: level=0 fsel=0 func=INPUT
GPIO 17: level=0 fsel=0 func=INPUT
GPIO 18: level=0 fsel=0 func=INPUT
GPIO 19: level=0 fsel=0 func=INPUT
GPIO 20: level=0 fsel=0 func=INPUT
GPIO 21: level=0 fsel=0 func=INPUT
GPIO 22: level=0 fsel=0 func=INPUT
GPIO 23: level=0 fsel=0 func=INPUT
GPIO 24: level=0 fsel=0 func=INPUT
GPIO 25: level=0 fsel=0 func=INPUT
GPIO 26: level=0 fsel=0 func=INPUT
GPIO 27: level=0 fsel=0 func=INPUT
BANK1 (GPIO 28 to 45):
GPIO 28: level=0 fsel=0 func=INPUT
GPIO 29: level=0 fsel=0 func=INPUT
GPIO 30: level=0 fsel=0 func=INPUT
GPIO 31: level=0 fsel=0 func=INPUT
GPIO 32: level=0 fsel=0 func=INPUT
GPIO 33: level=0 fsel=0 func=INPUT
GPIO 34: level=1 fsel=0 func=INPUT
GPIO 35: level=1 fsel=4 alt=0 func=SPI0_CE1_N
GPIO 36: level=1 fsel=4 alt=0 func=SPI0_CE0_N
GPIO 37: level=0 fsel=4 alt=0 func=SPI0_MISO
GPIO 38: level=0 fsel=4 alt=0 func=SPI0_MOSI
GPIO 39: level=0 fsel=4 alt=0 func=SPI0_SCLK
GPIO 40: level=0 fsel=0 func=INPUT
GPIO 41: level=0 fsel=0 func=INPUT
GPIO 42: level=0 fsel=0 func=INPUT
GPIO 43: level=0 fsel=0 func=INPUT
GPIO 44: level=0 fsel=0 func=INPUT
GPIO 45: level=0 fsel=0 func=INPUT
BANK2 (GPIO 46 to 53):
GPIO 46: level=1 fsel=0 func=INPUT
GPIO 47: level=1 fsel=0 func=INPUT
GPIO 48: level=0 fsel=4 alt=0 func=SD0_CLK
GPIO 49: level=1 fsel=4 alt=0 func=SD0_CMD
GPIO 50: level=1 fsel=4 alt=0 func=SD0_DAT0
GPIO 51: level=1 fsel=4 alt=0 func=SD0_DAT1
GPIO 52: level=1 fsel=4 alt=0 func=SD0_DAT2
GPIO 53: level=1 fsel=4 alt=0 func=SD0_DAT3
We switched the default behaviour from pins 7-11 to pins 35-39 with these commands:

Code: Select all

./raspi-gpio set 35 a0
./raspi-gpio set 36 a0
./raspi-gpio set 37 a0
./raspi-gpio set 38 a0
./raspi-gpio set 39 a0

./raspi-gpio set 7 ip
./raspi-gpio set 8 ip
./raspi-gpio set 9 ip
./raspi-gpio set 10 ip
./raspi-gpio set 11 ip
By the way: Is there a way to permanently switch GPIO functions? This script has to run after every boot.

Could you please help us get CE0 on GPIO36 to work? Thank you. We will happily provide more information if needed.

User avatar
joan
Posts: 13307
Joined: Thu Jul 05, 2012 5:09 pm
Location: UK

Re: SPI: Chip Enable 0 doesn't work

Mon Jan 15, 2018 3:46 pm

The power-up modes of the GPIO are fixed as defined in https://www.raspberrypi.org/documentati ... herals.pdf page 102.

Are you using the Linux SPI driver? As a matter of interest do GPIO 7/8 act properly if left in ALT0 mode when running the test?

dislick
Posts: 10
Joined: Mon Oct 24, 2016 9:35 am

Re: SPI: Chip Enable 0 doesn't work

Mon Jan 15, 2018 4:13 pm

Yes, we are using the Linux SPI driver. Actually GPIO 7/8 are in func=OUTPUT mode when booting up (according to "raspi-gpio get", see output below). But it does work!

CH1: GPIO39
CH2: GPIO38
CH3: GPIO8

Image

Code: Select all

pi@raspberrypi:~/raspi-gpio $ ./raspi-gpio set 37 a0
pi@raspberrypi:~/raspi-gpio $ ./raspi-gpio set 38 a0
pi@raspberrypi:~/raspi-gpio $ ./raspi-gpio set 39 a0
pi@raspberrypi:~/raspi-gpio $ ./raspi-gpio get
BANK0 (GPIO 0 to 27):
GPIO 0: level=1 fsel=0 func=INPUT
GPIO 1: level=1 fsel=0 func=INPUT
GPIO 2: level=1 fsel=0 func=INPUT
GPIO 3: level=1 fsel=0 func=INPUT
GPIO 4: level=1 fsel=0 func=INPUT
GPIO 5: level=1 fsel=0 func=INPUT
GPIO 6: level=1 fsel=0 func=INPUT
GPIO 7: level=1 fsel=1 func=OUTPUT
GPIO 8: level=1 fsel=1 func=OUTPUT
GPIO 9: level=0 fsel=4 alt=0 func=SPI0_MISO
GPIO 10: level=0 fsel=4 alt=0 func=SPI0_MOSI
GPIO 11: level=0 fsel=4 alt=0 func=SPI0_SCLK
GPIO 12: level=0 fsel=0 func=INPUT
GPIO 13: level=0 fsel=0 func=INPUT
GPIO 14: level=1 fsel=4 alt=0 func=TXD0
GPIO 15: level=1 fsel=4 alt=0 func=RXD0
GPIO 16: level=0 fsel=0 func=INPUT
GPIO 17: level=0 fsel=0 func=INPUT
GPIO 18: level=0 fsel=0 func=INPUT
GPIO 19: level=0 fsel=0 func=INPUT
GPIO 20: level=0 fsel=0 func=INPUT
GPIO 21: level=0 fsel=0 func=INPUT
GPIO 22: level=0 fsel=0 func=INPUT
GPIO 23: level=0 fsel=0 func=INPUT
GPIO 24: level=0 fsel=0 func=INPUT
GPIO 25: level=0 fsel=0 func=INPUT
GPIO 26: level=0 fsel=0 func=INPUT
GPIO 27: level=0 fsel=0 func=INPUT
BANK1 (GPIO 28 to 45):
GPIO 28: level=0 fsel=0 func=INPUT
GPIO 29: level=0 fsel=0 func=INPUT
GPIO 30: level=0 fsel=0 func=INPUT
GPIO 31: level=0 fsel=0 func=INPUT
GPIO 32: level=0 fsel=0 func=INPUT
GPIO 33: level=0 fsel=0 func=INPUT
GPIO 34: level=1 fsel=0 func=INPUT
GPIO 35: level=0 fsel=0 func=INPUT
GPIO 36: level=1 fsel=0 func=INPUT
GPIO 37: level=0 fsel=4 alt=0 func=SPI0_MISO
GPIO 38: level=0 fsel=4 alt=0 func=SPI0_MOSI
GPIO 39: level=0 fsel=4 alt=0 func=SPI0_SCLK
GPIO 40: level=0 fsel=0 func=INPUT
GPIO 41: level=0 fsel=0 func=INPUT
GPIO 42: level=0 fsel=0 func=INPUT
GPIO 43: level=0 fsel=0 func=INPUT
GPIO 44: level=0 fsel=0 func=INPUT
GPIO 45: level=0 fsel=0 func=INPUT
BANK2 (GPIO 46 to 53):
GPIO 46: level=1 fsel=0 func=INPUT
GPIO 47: level=1 fsel=0 func=INPUT
GPIO 48: level=0 fsel=4 alt=0 func=SD0_CLK
GPIO 49: level=1 fsel=4 alt=0 func=SD0_CMD
GPIO 50: level=1 fsel=4 alt=0 func=SD0_DAT0
GPIO 51: level=1 fsel=4 alt=0 func=SD0_DAT1
GPIO 52: level=1 fsel=4 alt=0 func=SD0_DAT2
GPIO 53: level=1 fsel=4 alt=0 func=SD0_DAT3

User avatar
joan
Posts: 13307
Joined: Thu Jul 05, 2012 5:09 pm
Location: UK

Re: SPI: Chip Enable 0 doesn't work

Mon Jan 15, 2018 5:26 pm

I think the Linux driver was changed to toggle the chip selects itself rather than using the hardware. That would explain why the GPIO are in mode OUTPUT rather than ALT0.

Perhaps this is simply a driver code error and the driver is defaulting still to GPIO8 for CE0 and GPIO7 for GPIO1.

I would explicitly set the GPIO in use in the dtoverlay line.

Have a look at /boot/overlays/README in particular perhaps try

Code: Select all

Name:   spi0-cs
Info:   Allows the (software) CS pins for SPI0 to be changed
Load:   dtoverlay=spi0-cs,<param>=<val>
Params: cs0_pin                 GPIO pin for CS0 (default 8)
        cs1_pin                 GPIO pin for CS1 (default 7)

User avatar
joan
Posts: 13307
Joined: Thu Jul 05, 2012 5:09 pm
Location: UK

Re: SPI: Chip Enable 0 doesn't work

Mon Jan 15, 2018 5:27 pm

Perhaps you need to use

Code: Select all

Name:   spi-gpio35-39
Info:   Move SPI function block to GPIO 35 to 39
Load:   dtoverlay=spi-gpio35-39
Params: <None>

dislick
Posts: 10
Joined: Mon Oct 24, 2016 9:35 am

Re: SPI: Chip Enable 0 doesn't work

Tue Jan 16, 2018 9:25 am

Wow, that works flawlessly! Thank you joan.

For anyone else who faces the same issue; You need to add to following line to /boot/config.txt:

Code: Select all

dtoverlay=spi-gpio35-39

It enables the /boot/overlays/spi-gpio35-39.dtbo device tree overlay. More information can be found here: https://www.raspberrypi.org/documentati ... ce-tree.md

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