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nsayer
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Stupid question about SPI: multi-threaded access

Fri May 12, 2017 3:16 pm

I'd have to assume the answer is "yes," but is there anything in the SPI system that insures that simultaneous access to /dev/spidev0.0 and /dev/spidev0.1 wind up being properly interleaved rather than just step on each other? I have a potential use case where the two would be opened by separate programs and would not attempt to coordinate writes. Since the two chip selects are separate, it doesn't really matter what order writes are done in, just as long as the hardware doesn't get confused and try to do them both at the same time or interrupt a transfer in progress or anything silly like that.
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joan
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Re: Stupid question about SPI: multi-threaded access

Fri May 12, 2017 3:54 pm

You'd have to look through the kernel SPI driver code to get an assurance. I presume some sort of mutex will be implemented within the driver.

notro
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Re: Stupid question about SPI: multi-threaded access

Sat May 13, 2017 7:45 pm

joan is right, there's a mutex in spi_sync() in the kernel.
http://elixir.free-electrons.com/linux/ ... t/spi_sync

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nsayer
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Re: Stupid question about SPI: multi-threaded access

Mon May 15, 2017 6:21 pm

Awesome. That's what I hoped. Thanks.
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