baantonia
Posts: 63
Joined: Fri Feb 06, 2015 2:19 pm

Two Pis communicating via SPI

Thu Aug 18, 2016 8:47 am

I'm trying to interface two Pis via SPI. The Pi3 has been set up as the master, GPIO connections 7-11 as ALT0, and is sending data as if it was connected to a Gertboard with a mcp3002 ADC chip, this works with the Gertboard. The compute module has had GPIO connections 18-21 set up as ALT3 with the CR register bits EN=1, SPI=1, I2C=0, CPHA=1, CPOL=1, TXE=1 and RXE=1. I'm monitoring what the Pi3 receives and that currently is a string of zeros, the compute module I'm monitoring via UART through to putty running on a laptop, which also shows a string of zeros. However the data from the Pi3 is that which would be sent to interrogate channel 0 on a mcp3002 chip ie 0x68 followed by 0x00 then repeated. This is what I would expect to see on the compute module output and on the output on the Pi3, as what the compute module is receiving it is sending back. When I stop the routine running on the Pi3 the output stops from the compute module. Also if I run the routine on the Pi3 but have commented out the FIFO writes, as expected the compute module has no output. So I know they are communicating but I don't see the correct data being transferred. Any clues where I might be going wrong?

GPIO connections
Comp Mod<--> Pi3
18 (MOSI)<-->10 (MOSI)
19 (SCLK)<-->11 (SCLK)
20 (MISO)<-->9 (MISO)
21 (CE_N)<-->8 (CE0)

User avatar
joan
Posts: 15039
Joined: Thu Jul 05, 2012 5:09 pm
Location: UK

Re: Two Pis communicating via SPI

Thu Aug 18, 2016 9:01 am

The current Linux SPI drivers only support master mode. Are you bit banging the receive end in the compute module? Otherwise both ends are masters and nothing much of any use will happen.

If you turn off SPI mode on the compute module (i.e. leave each SPI GPIO in INPUT mode) you could try sniffing the data with http://localhost/pigpio/examples.html#Python_SPI_mon_py if you use a low data rate. Alternatively if you remove the wires from the Pi to the compute module you could sniff the data at the transmit end.

MOSI one end should go to MISO on the other.

baantonia
Posts: 63
Joined: Fri Feb 06, 2015 2:19 pm

Re: Two Pis communicating via SPI

Thu Aug 18, 2016 9:29 am

My Pi3 is running RISCOS using a module I've written, there is no problem there as I have had it communicating with a number of SPI chips.

The compute module is running bare metal which I have also been able to communicate as a SPI master to a mcp3002 chip.

My overall goal is to create an interface for the Pi3 which is consistent so that changing the SPI/I2C/parallel ADC input interface on the compute module/Pi Zero, only needs an updated intermediate compute module or Pi Zero rather than modifying the Pi3 software. Also plan to use another core on the Pi3 to pass communicate with the Compute Module or Pi Zero, but that's another story.

I tried swapping the MISO/MOSI yesterday but I didn't have the CR bits TXE and RXE set, I'll try swapping the pins now.

baantonia
Posts: 63
Joined: Fri Feb 06, 2015 2:19 pm

Re: Two Pis communicating via SPI

Thu Aug 18, 2016 9:33 am

Swapping MISO/MOSI made no difference.

Puzzled?????

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joan
Posts: 15039
Joined: Thu Jul 05, 2012 5:09 pm
Location: UK

Re: Two Pis communicating via SPI

Thu Aug 18, 2016 10:17 am

I assumed you were using Linux. I can't help with RISC OS or bare metal.

baantonia
Posts: 63
Joined: Fri Feb 06, 2015 2:19 pm

Re: Two Pis communicating via SPI

Thu Aug 18, 2016 10:38 am

RISCOS and bare metal aside, that I can cope with.

What I'm not sure about is what settings need to be in place for the SPI slave to function correctly, ie the register settings.

I've just checked that the routine running on the Pi3 is actually communicating, first using a Gertboard and then poking around on the pins using an oscilloscope. The original routine wasn't sending data correctly, that's been swapped, that's the first issue solved (but the RISCOS SPI Module was functioning correctly). The second issue, your suggestion of swapping the MOSI/MISO pins is now in place. A third issue was that the CE_N was connected to the CE0 on the Pi3 but wasn't being held low for some reason so I've connected the CE_N to ground.

I'm now getting data being seen through the UART on the compute module to putty, so thank you joan your suggestion about the pin swap has helped. I now need to find out why the data is not getting back to the Pi3.

baantonia
Posts: 63
Joined: Fri Feb 06, 2015 2:19 pm

Re: Two Pis communicating via SPI

Thu Aug 18, 2016 2:45 pm

I've checked all my settings and I'm getting data transferred from the Pi3 using the SPI master and this is being received in the compute module SPI slave. The clock is functioning from the master but hard as I try, the slave doesn't send a signal back. I'm writing 0xAA to the slaves DR register so it should look similar to a clock signal on an oscilloscope but I get nothing, there is no level shift.

Has anyone managed to set a RPi up as a SPI slave?

baantonia
Posts: 63
Joined: Fri Feb 06, 2015 2:19 pm

Re: Two Pis communicating via SPI

Fri Aug 19, 2016 12:19 am

As far as I can detect, the slave SPI TX FIFO has enough storage for 16 bytes, After modifying my code for the Pi Zero (I've changed it from the compute module to see if that makes a difference) the code loops on waiting for space in the TX FIFO to become available, however this never happens, the TX FIFO remains full.

I've also tried changing the divisor of the SPI masters (Pi3) clock but still no joy. Earlier I did see if setting GPIO18 to output rather than ALT3 and changed the levels in a loop setting and clearing the pins GPIO with delays between each transition. When no SPI communication was taking place the change in the levels were detected using an oscilloscope. However when SPI communication was taking place the levels on GPIO18 were interfered with despite no data being written to the slaves TX FIFO and being set to an output rather than ALT3. I seem to be reaching a conclusion that the BCM2835 SPI slave interface doesn't work, unless someone can contradict my current assertions.

There seems to be plenty of documentation out on the Internet about using Pis as SPI masters but very little regarding their SPI slave capabilities apart from saying they have it.

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