baantonia
Posts: 63
Joined: Fri Feb 06, 2015 2:19 pm

SPI and Interrupt mode

Tue Jun 07, 2016 6:24 am

After successfully interfacing a number of ADC chips using polled mode I’m now trying to use interrupt mode, however this is being annoyingly elusive.

So far I have added code to the SPI module, I wrote some time ago, to us the interrupt vector at &100 (note I'm using RISCOS) and have enabled the SPI interrupt bit (22) of the “Enable IRQs 2”, pages 112-113 of the BCM2835 documentation. Also, setting the appropriate GPIO pins to Alt 0 and setting the “CS Register” as in the process on page 158 for interrupt mode.

The vector is working fine with all IRQs being routed through my handler which are then being passed on to the original address. However on setting the CLEAR an TA bits of the CS Register, according to the documentation this is meant to trigger the first interrupt with DONE being set but that’s not happening. I could try setting TA without setting the CLEAR bits at the same time but I wanted to clear the FIFO’s before entering my handler.

I have connected an oscilloscope to check the pins but only the SPI clock pin is active, MISO and MOSI are both inactive.

All is in ARM assembler.

Any clues what I’m missing?

An update: Looked more closely at the voltages on the SCLK, MISO and MOSI pins. The oscilloscope shows a good clock on the SCLK pin but on the MOSI pin the signal is only a fraction of the 3.3V so is probably too small for the mcp3002 chip on my Gertboard to detect. Using polled mode I have no issues, ADC works fine with 3.3V signals on all pins.

baantonia
Posts: 63
Joined: Fri Feb 06, 2015 2:19 pm

Re: SPI and Interrupt mode

Wed Jun 08, 2016 4:17 pm

Tried mirroring the polled method but using a state flag to show at what stage in the sequence the routine was in whilst in an interrupt. Switched off INTR and INTD bits in the CS Register so just used any interrupt that happened to come along. Got the same result SCLK was ticking fine but the voltage on the MOSI was so small it was almost negligible.

Is there a problem with the SPI working correctly whilst in an interrupt mode? Polling whilst the processor in user mode is fine.

baantonia
Posts: 63
Joined: Fri Feb 06, 2015 2:19 pm

Re: SPI and Interrupt mode

Wed Jul 20, 2016 11:41 am

I think my issue is because the REN bit in the CS register is set by default so the SPI0 would be in bidirectional mode rather than standard mode, the latter using 3 lines rather than 2. Although not tested yet within an interrupt, I expect this would solve my problem.

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