The Raspberry Pi Zero CSI connector has the same pinout as the compute module IO board CSI connectors, but two of the four CSI data lanes are not connected. I always assumed it was because the BCM2835 didn't have a 4-lane CSI input. But I just realized the compute module v1.1 does have a 4-lane CSI input, connected to its venerable BCM2835.
So I'm wondering, why not route the zero CSI connector to the SoC's 4-lane CSI input? Is it because that specific variant of the BCM2835 doesn't expose these pins? Is it because the PCB layout is already too densely packed to accommodate another 5cm of differential pairs? Is it to simplify firmware/software portability across the (non-CM) Raspberry Pi product line? Is it to prevent the zero from cannibalizing the compute module market?