CPLD Programming over GPIO

[peterburk]

I'd like to learn about JTAG programming and what to do with two Xilinx CPLDs chips I bought.

Having used my PiPod http://peterburk.dyndns.org/pipod (Raspberry Pi inside an iPod shell) for several months, I decided to add more features, including a screen. Rushing around Huaqiangbei electronics market in Shenzhen on Saturday, I saw a Nokia 3310 LCD on a PCI debugger: http://www.ebay.com/itm/PCI-Motherboard ... 1145223773 for 78 rmb = £8.29. On a hunch, I bought it. Sure enough, the LCD works perfectly! But I could do so much more. When I saw the Xilinx logo on the controller chip, my heart skipped a beat. I have fond memories of Xilinx FPGA programming in 2nd year of university, and I really hope I can now do it with my Raspberry Pi! This is an educational project, so I'm willing to work hard and make something work imperfectly, rather than buying a pre-built add-on board.

What I have:
• Xilinx XC9536XL CPLD x2 (there's one on the PCI board, and one on the mini PCIe board). Maybe 3 chips, there's an unmarked one that looks identical on the PCI board.
• 5 days per week, 9:00-18:00, until 24th August. Then I'll start a Ph.D. in EE at KAIST, and all projects will have to pause for a while.
• Huaqiangbei electronics market (read: eBay electronic section's storefront with no map) every Saturday for 45 minutes (that's as long as my girlfriend is willing to wait).
• A colleague who can do professional surface-mount soldering.
• Friends in a PCB factory who could fulfil a minimum order of 500 pieces (though I doubt I'll need to call them for this project, it's a shameless plug).
• I2C on my laptop: http://www.paintyourdragon.com/?p=43 (again, probably not relevant for this project, but I was excited to discover it).
• Coding skills in Verilog (from UC Santa Barbara 2nd year) and VHDL (from Lancaster University, 3rd year). My EE degree might finally be directly useful!
• A MacBook Pro, and Ubuntu, CentOS, WinXP and Win7 virtual machines.
• A Raspberry Pi with a GPIO header.
• Surface-mount resistors and capacitors of various sizes.
• A soldering station and reflow tool.
• From the PCI card: A clock oscillator marked 24.000, 6 LEDs, 4 push-buttons, 2x JTAG (2x5 pin) ports, and a JTAG cable.
• Motivation

What I don't have:
• A parallel port. I may be able to borrow a desktop PC, but I probably wouldn't have admin rights to install software, so it's really a no-go.
• A chip programmer.
• The original code from the PCI debugger XC9536XL CPLDs. Is it possible to back it up?
• A Guzunty Pi (http://raspi.tv/2013/guzunty-pi-open-so ... spberry-pi) or PiXi board (http://www.cantrills.com/astro-designs/pixi/).
• An address for online shopping to be delivered. Not to mention, there probably isn't time for things to ship.
• Veroboard. And we're out of hot glue, so insulation is now being done with masking tape.

Questions:
• Is it possible to program the Xilinx XC9536XL CPLD using JTAG-over-GPIO from the Raspberry Pi?
• Am I missing any essential hardware? I'll need to buy it this weekend.
• Does anyone have a circuit diagram for mounting one of these chips?
• Eventually, I'd love to write Verilog/VHDL and deploy it to the CPLD while leaving it connected to GPIO, viewing the output on other GPIO inputs to the RPi.
What are some achievable goals I can aim for within the time? Is it possible to break down my project into smaller tasks - and how could I test it at each stage?

Thanks for any thoughts, encouragement, warnings, etc that you have.
Peter

[DaveTheWalker]

Hi - sounds like fun!

You say you don't have a GuzuntyPi, but you've obviously heard of them, and what you're trying to do is almost exactly the same as what happens on the Guzunty. I suggest you read through all the documentation for that project (schematics, software tools etc..) until you understand how it's programmed.

You'll probably end up making xsvf files on the PC, copying them to the Pi and programming the CPLD that way.

Have a chat with "guzunty" on these forums (fora?) - I'm certain he could help you out.

Good luck!

[guzunty]

Hi, here goes:

• Is it possible to program the Xilinx XC9536XL CPLD using JTAG-over-GPIO from the Raspberry Pi?
Yes. Definitely. If you wire up the GPIOs to the JTAG pins the same as the Guzunty schematic, the gz_load utility will work for sure. I have used it on larger variants of the XC9500XL series so I'm as sure as I can be it will work on smaller ones. If you cannot have the JTAG signals on the same GPIO pins, then you can still use gz_load by modifying the source to set the pins you need. Avoid using the SPI pins as JTAG signals, SPI is probably the best interface for communicating with the running core.

• Am I missing any essential hardware? I'll need to buy it this weekend.
Not much additional hardware needed for the programming interface. See the Guzunty BOM. You need some decoupling capacitors and some pullups for the JTAG signals. Quite possibly you already have them in your parts box.

• Does anyone have a circuit diagram for mounting one of these chips?
Sure: https://github.com/Guzunty/Pi/tree/master/schematic You'll need to modify this for the VQ44 package pinout. The pinouts for the different packages are documented here: http://www.xilinx.com/support/documenta ... /ds058.pdf

• Eventually, I'd love to write Verilog/VHDL and deploy it to the CPLD while leaving it connected to GPIO, viewing the output on other GPIO inputs to the RPi.
Given where you are in the world, I think this is feasible within a month. Obviously, it depends to a significant extent on your electronic design skills, but from your background I'd say that's a given.

• Is it possible to break down my project into smaller tasks - and how could I test it at each stage?
The CPLD circuit design and construction is pretty much all or nothing, so I don't see any smaller steps. The time to get a PCB made is going to be on the critical path so do that first. For most places in the world, the turnaround time is about 3-4 weeks. You're lucky where you are, it will be much shorter. Alternatively, you might consider a 'dead bug' type of construction if you don't feel you have time to get a PCB made.

You can save some time by grabbing the Guzunty test code and VHDL. Unfortunately, you won't be able to use the downloadable xsvf files because they are specific to the PC-44 package. You'll therefore need to obtain and install ISE. You get that starting here:

http://www.xilinx.com/products/design-t ... ebpack.htm

Be prepared for a very long download if you select the most recent version of the tool, it's _huge_.

You can get older, smaller versions of the tool. They will work because the XC9500XL series has been around awhile. Don't go older than about version 10 or 11 if you want a simulator (and trust me, you _do_ want a simulator ). Xilinx switched from using a Mentor Graphics simulator to using their own around this time. I don't recall the exact version they switched. There is nothing wrong with the MG simulator, but it will almost certainly be entangled in licensing issues.

Choose the 'Webpack' version of ISE to avoid licensing entanglements and delays. Webpack is free and 100% functional for the XC9500XL series.

Phew! That's about it. Good luck and please let us know how you get on.

Finally, wow! That iPod is an old first generation one if I'm not mistaken, there can't be too many of those around any more.

[peterburk]

Dave - Thanks for your encouragement! I did message guzunty, and he answered, as you can see . Making xsvf files on a VMWare PC is possible at first, but it would be pretty awesome to do it all in my pocket. Given that I have Bochs emulating a Win98 system on my jailbroken iPhone, perhaps I could use an old version of Xilinx ISE, as slow as that may be.

guzunty - I knew you'd be a huge help! I'm looking forward to building this and joining the GuzuntyPi community with some new core ideas when it's ready. This is a much cheaper, more portable, and more user-friendly solution than the Windows XP+$250 Xilinx programmer+parallel cable setup I used in UCSB. Developing new cores is a very valuable industrial skill - people might be tempted by headhunters to drop out of high school for top-tier electronic engineering jobs if this takes off!

The Guzunty BOM wasn't on the Wiki as such, but I read it from the schematic as follows:
47k Resistors x3
3u3 Capacitors x2
0u1 Capacitors x3
I don't have a "parts box" per se, because I've been doing short-term internships in several different countries and the whole setup from my dad's workshop doesn't fit in my rucksack. However, the office workshop here in Shenzhen does have a near-limitless supply of broken MP3 players. I also found a power supply in there with some nice through-hole resistors today, so I'll have a look for some 47k ones. I'm hopeful I'll be able to salvage something. I found a spare 44-pin PLCC socket in there today, so things are looking good.

This does seem to be all-or-nothing, but you've done well to reassure me that it's easier than I feared. The PCB company I have friends in have a minimum order of 500 pieces, but I'm only trying to make 2 (one for me to use, one spare for when it breaks). If there are any Guzunty PCBs still on this side of the world, that would make the wiring much easier! Otherwise it's going to be a dead bug.
• Are there any PCBs near to Shenzhen, that I could get by visiting a store/factory?

I exhaustively checked the pinouts for the XC9536XL (mine) and XC9572XL (Guzunty), and made a list of the changes. Everything that's the same has an = sign in the first column. I saw something http://bitcycle.org/electronics/1st_CPLD_project/ that said the PLCC and VQ44 packaging pins are just offset, and that seems to be the case. I also read that the pin numbers start in the middle of a row for PLCC.
• Does that mean the VQ44 would actually fit the GuzuntyPi PCB if I could get my hands on one?

All the JTAG and power pins are the same, thankfully! I believe this means that programming it using gz_load will be a breeze.
• What changes will I need to make, if any, to compensate for the differences in the function blocks? I only have 2 function blocks in the same number of pins, as you can see. That's a problem for the future though, once my hardware is built.
• I may be just getting confused, but the Xilinx JTAG programming docs say that it's quite clock-sensitive. I also read that the Raspberry Pi doesn't have a real-time clock. I believe the GuzuntyPi works, but how did you manage it without an oscillator?
• Is it possible to backup the code that's already on the CPLD? I'm pretty sure I won't need to restore the PCI card I'm salvaging the chip from, but I'm curious about reverse-engineering it.

Guzunty PLCC VQ44 XC9536XL VQ44
1 FB1MC2 39 39 FB2MC1
2 FB1MC5 40 40 FB1MC1
3 FB1MC6 41 41 FB1MC2
4 FB1MC8 42 42 FB1MC4
= 5 GCK1=FB1MC9 43 43 GCK1=FB1MC3
= 6 GCK2=FB1MC11 44 44 GCK2=FB1MC5
= 7 GCK3=FB1MC14 1 1 GCK3=FB1MC7
8 FB1MC15 2 2 FB1MC6
9 FB1MC17 3 3 FB1MC8
= 10 GND 4 4 GND
11 FB3MC2 5 5 FB1MC9
12 FB3MC5 6 6 FB1MC10
13 FB3MC8 7 7 FB1MC11
14 FB3MC9 8 8 FB1MC12
= 15 JTAG_TDI 9 9 JTAG_TDI
= 16 JTAG_TMS 10 10 JTAG_TMS
= 17 JTAG_TCK 11 11 JTAG_TCK
18 FB3MC11 12 12 FB1MC13
19 FB3MC14 13 13 FB1MC14
20 FB3MC15 14 14 FB1MC15
= 21 VCC 15 15 VCC
22 FB3MC17 16 16 FB1MC16
= 23 GND 17 17 GND
24 FB3MC16 18 18 FB1MC17
25 FB4MC2 19 19 FB2MC17
26 FB4MC5 20 20 FB2MC16
27 FB4MC8 21 21 FB2MC15
28 FB4MC11 22 22 FB2MC14
29 FB4MC14 23 23 FB2MC13
= 30 JTAG_TDO 24 24 JTAG_TDO
= 31 GND 25 25 GND
= 32 VCCIO 26 26 VCCIO
33 FB4MC15 27 27 FB2MC12
34 FB4MC17 28 28 FB2MC11
35 FB2MC2 29 29 FB2MC10
36 FB2MC5 30 30 FB2MC9
37 FB2MC6 31 31 FB2MC8
38 FB2MC8 32 32 FB2MC7
= 39 GSR=FB2MC9 33 33 GSR=FB2MC6
= 40 GTS2=FB2MC11 34 34 GTS2=FB2MC5
= 41 VCC 35 35 VCC
= 42 GTS1=FB2MC14 36 36 GTS1=FB2MC3
43 FB2MC15 37 37 FB2MC4
44 FB2MC17 38 38 FB2MC2

[guzunty]

Hi Peter,

>The Guzunty BOM wasn't on the Wiki as such
Correct, it is version controlled under the GitHub code section here:

https://github.com/Guzunty/Pi/tree/mast ... 0materials

however, you got the right parts and values.

• Does that mean the VQ44 would actually fit the GuzuntyPi PCB if I could get my hands on one?
No, the Guzunty PCB uses a PLC-44 through hole socket to make it easier for folks to solder.

• What changes will I need to make, if any, to compensate for the differences in the function blocks?
The smaller capacity of the 36 macrocell variant will mean some of the cores will simply not fit. They can be cut down to implement fewer instances of a given feature, such as LED digits driven or number and/or precision of PWM outputs.

However, others will run unchanged I'm sure! When you get ISE running, you tell it which device and package you are using. The Fitter tool does most of the rest! You may have to tweak the User Constraint File which specifies which signals are routed to which pins.

• I may be just getting confused, but the Xilinx JTAG programming docs say that it's quite clock-sensitive. I also read that the Raspberry Pi doesn't have a real-time clock. I believe the GuzuntyPi works, but how did you manage it without an oscillator?
You're right, it is quite clock sensitive. Although there is no real time clock, the Pi has enough hardware clock support to allow the programming to work reliably. I did the work, so you don't have to.

• Is it possible to backup the code that's already on the CPLD?
I'm not aware of any ready made software tools to do it. However, the JTAG protocol is extremely flexible, I'm 99% sure you could figure out how to read the existing program. Getting back from a netlist to the original design would be a challenge. Also, I think I recall there is an IP security fuse that blocks this functionality, so it might not work if the PCI card designers decided to read protect it.

You're quite right about the value of CPLD knowledge on a CV. It is the main reason I started the Guzunty project. I wanted to get people started with ready made downloadable cores and then encourage them to start making their own. It fits exactly with the educational goals of the Raspberry Pi.

Please spread the word!

[guzunty]

>It would be pretty awesome to do it all in my pocket. Given that I have Bochs emulating a Win98 system on my jailbroken iPhone, perhaps I could use an old version of Xilinx ISE, as slow as that may be.

That would be really cool! Before you burn a lot of time trying this, be aware that ISE makes my laptop fans go big time. That is a sign that it is eating a lot of resources.

You may be lucky though, everything can be done from the command line and I have reason to suspect that it is the GUI's that are eating cycles.

Do let me know if you get this working! Currently I tell people that you cannot do the actual CPLD core development on the Pi, though you can do everything else. I'd love to be able to say that you can do everything on our beloved little tiny computer.

Bochs will run on the Pi apparently:
http://www.raspberrypi.org/phpBB3/viewt ... 56&t=13161

[peterburk]

This project seems so promising - I hope I can convince a professor in KAIST to supervise me for some parts of this project, and count it towards my Ph.D.!

Writing a lightweight GUI tool to use Xilinx's command-line synthesiser won't be hard. Back in New Zealand I made a graphical design tool for the Pertecs analogue computer http://tcode.auckland.ac.nz/~mark/Signa ... RTECS.html, because most people except Mark can't understand how to use it. It took as long to design the icons as to write the code. I could even try making a cross-platform one in AJAX, like jsTIfied: http://www.cemetech.net/projects/item.php?id=42#s2.

CPLDs are great because they're non-volatile, but I think that some of my project ideas will require more resources than the 800 gates on my XC9536XL.
• Do you have plans to make add-on boards for larger FPGAs?

Here are a few projects that really excite me.
- SR latches (and JK flip-flops, etc) can be implemented very easily with a CPLD, which would make what is now a theory-only RAM design class in Lancaster into a practical one!
- PDP-8 on FPGA (my dad is really interested in PDP-8s, as they were his first computer): http://www.emeritus-solutions.com/pdp8onanfpga.htm
- Z80 CPU could run a TI-83 on FPGA: http://opencores.org/project,t80
- minSOC implements RAM, Ethernet, SPI, and UART on FPGA: http://opencores.org/project,minsoc
- Storm Core implements ARM7, which could in turn become an iPod or Nokia phone: http://opencores.org/project,storm_core
- ao68000 implements a 68k Motorola processor, which could become a Macintosh Plus running System 7: http://opencores.org/project,ao68000
- Zet implements x86, which is capable of running MS-DOS and Windows 3.0 programs that are 16-bit: http://zet.aluzina.org/index.php/Zet_processor

Currently kids' parents are still buying TI-83 calculators for $110 for their maths classes: http://xkcd.com/768/. A USB programmer from Xilinx costs $250, which is the main reason I used the university's lab instead of buying my own kit (and is the reason I've been getting rusty in VHDL for 2 years, Verilog for 4 years). Using the T80 CPU from OpenCores, a Raspberry Pi as an FPGA programmer, and a Guzunty FPGA board, we could make a TI-compatible graphical calculator for cheaper. It's more than a "programmable calculator" - it's a calculator design that's actually programmed!

Since I got the Nokia 3310 screen working on GPIO without any trouble (and at a very low cost), synthesising the Nokia 3310 processor on an FPGA using Storm Core would be exhilarating. Ok, we'll need to rewrite the OS, but it would be a true hardware clone and fully binary-compatible. I'm imagining some 14 year-old kids having a conversation "My parents won't buy me a phone until I'm 16", "That's ok, I made my own using my Raspberry Pi". They'll need a modem too, of course, but at least they could play Snake.

I'll list the required gate counts for those projects when I download the Xilinx ISE on a stable internet connection in the office tomorrow. I'm excited about how far I've come in the last 7 years though - from learning how to use a TI-83 when I was 16 for my IB Maths Higher class, to designing one now I'm 23.

Peter

[guzunty]

• Do you have plans to make add-on boards for larger FPGAs?

We have indeed given this some thought.

We have looked at a board for the larger CPLD's like the 144 and 288 macrocell ones. The drawback there is that they are not available in packages that can plug into through hole mount sockets. The '72 is the biggest that can do that. The 144 is available in a QFP100 format which is hand solderable, but I think it would scare a lot of people off. The smallest 288 is in a QFP144 format which is the same pitch as the QFP100 (IIRC) but obviously even more daunting to solder.

FPGA's present a similar challenge and are also a bit more expensive versus the CPLD, so the consequences of making a mistake during assembly are that much greater.

We could look at prebuilt ones, but then the cost goes up. You can build your own Guzunty for only about $15.

Other than that, we have an open mind and we're all ears if you have any suggestions for ways in which we could bring FPGA sized devices to Pi users on a budget that is compatible with the entry price for the Pi itself.

As you indicated with your list, the possible applications are almost mind boggling.

[peterburk]

We? How many people are in the Guzunty team? I might have a few friends from Lancaster University interested in this project.

How realistic would it be to make a PCB breakout for the 672 pins on the Virtex? Sure, the size is large, but the flexibility would be so appealing. The BGAs aren't terribly expensive either, $82 on AliExpress: http://www.aliexpress.com/item/Brand-ne ... 32924.html.

More realistically, a Spartan-6 is only $13 with 256 pins: http://www.aliexpress.com/item/Spartan- ... 18333.html.

As I mentioned, I have friends in a PCB factory, so I hope I could get the best possible price for printing them. I'll need to find an assembler to mount the ICs onto the board, but I'm inclined to believe that a single-component mount would be pretty cheap in this part of the world.

My excitement about mind-boggling applications has continued, and I discovered that there are even digital variable resistors and capacitors. Every single circuit could be designed in software and deployed onto completely configurable hardware!

Resistors include the Rejustor/DigiPot/MAX5527, for $0.05 each: http://www.alibaba.com/trade/search?fsb ... xt=MAX5527
Capacitors include the MAX1474/PE621020, for $0.1 each: http://www.alibaba.com/product-gs/90873 ... X1474.html

MEMS inductors are still only in universities though. Some designs are protected by patents, but there's no products on the market. Maybe a servo + screwdriver will do?
http://www.ime.pku.edu.cn/mems/faculty/ ... tors-2.pdf

Then there's memristors, but HP/Hynix aren't releasing those until next year so they won't damage the flash memory market.

Right now the tuning range on these devices is pretty small, but with enough quantity in series/parallel (controlled by more CPLDs), I think it'd be possible to design something practical. It would take a truckload of DigiPots and variable Capacitors to replace the 319 components in my MacBook Pro, but I believe that small, simple circuits could be made this way. What do you think? Are my dreams getting too unrealistic, or could a fully component-programmable computer fit inside say, a PDP-8 shell?

Peter

[guzunty]

Very cool stuff.

Have you come across this:

http://m.youtube.com/watch?v=sYN_7R6EDb ... YN_7R6EDbI

Mixed signal ASICs. Now, if someone cracks a field programmable version of THAT tech we're in for a very interesting ride.

[peterburk]

Sounds like a good application of MEMS. I haven't yet specified a Ph.D. topic for my next 4 years at KAIST... maybe we are in for an interesting ride! I have ethical problems with the defence applications of Triad's designs, but it's usually consumers who value flexibility > reliability. So I'm pretty sure that this tech would make the world a better place .

I heard about single-mask ViaASICs in a class in Lancaster, but I didn't know which companies were making them. Thanks for reminding me! In the meantime, the PCB level could be programmable using CPLDs and sufficiently-rated transistors. If we build a large-scale prototype using off-the-shelf components, that'll start peoples' imaginations going, and applications will be ready by the time it's reduced within a single chip package.

This can also be paired with a software-defined radio; some people are using tunable DVB TV sticks to listen to ADS-B radar data from planes. My antenna's not good enough for that, but I could pick up FM radio. Someone else got FM radio transmission from the RPi with only GPIO and a single bare wire. A reconfigurable radio in my phone could reduce cost and power consumption - and if the other tuned circuit elements can be software-adjusted too, there's no end to the flexibility available!

Peter

[DaveTheWalker]

Just to chip in on this thread...

A while back, I had the opportunity to play with some Cypress PSoC5 chips:

http://www.cypress.com/?id=2233

They have a programmable CPLD section, an embedded processor and some configurable analogue blocks. At the moment, it's all set up using their drag-and-drop graphical interface.

Might be worth interfacing one of those to a Pi, to see what it could achieve?

[peterburk]

Dave:
Thanks for the link! It looks very interesting; it's too bad that the chips are being discontinued. Check the PSoC® 5 Categories links - all of the chipsets say "Not Recommended for New Designs". They're also quite expensive, e.g. $19.33 1-10 unit Price for the CY8C5566AXI.

I'm impressed at their integration of analogue blocks & digital CPLD though - that's along the lines of what I'm envisaging.

Peter

[DaveTheWalker]

Hi Peter,

I just spoke to Cypress, because I was surprised to see the PSoC5 discontinued... Good news!

The PSoC 5 was an early release silicon with some de-rated features to get the part in to production for some lead customers.

This has been replaced by the PSoC 5 LP. The specification of this part was the original specification of PSoC 5, so it now is much lower power and better performance.
All the information you should require can be found on our website here: http://www.cypress.com/?id=4562

[peterburk]

Hi Dave,

Great! I obviously didn't look closely enough. I'll check the new datasheets and search Alibaba to see if I can pick up a few while I'm still in Shenzhen .

[peterburk]

Two weeks later, and I'm still trying to download the Xilinx software. That says something about the reliability of Chinese internet access and a huge (>5GB) download. Xilinx' download manager doesn't help either, when I change IP address several times during the course of the download.

I'm still fascinated by this project though, and I hope I can start soon.

Someone else made a GPS receiver using their Pi + FPGA setup:
http://www.holmea.demon.co.uk/GPS/Main.htm#

Peter

[guzunty]

Yes, the ISE download for version 14 is absolutely bloated. Some of it is cram-ware too. They could have provided a core and separate download links for the different parts to allow people to chose what they want.

Try one of the earlier ISE releases, they're much smaller and work just as well for the XC9500XL series parts which are quite mature. You should be OK with version 12 or even 11. Don't go back so far that you get one with the Mentor Graphics simulator. Not that there is anything wrong with it, just that the cross-licensing is likely to have expired and you'll have no simulator to use. I would not recommend that anyone tries to design with programmable hardware without a simulator.

Nice GPS project. Just don't expect that to fit in a 36 macrocell CPLD

- Derek

[peterburk]

My last week at work has been really rather busy, but I finally had time to spend on the Guzunty clone project this morning!

Because I don't have an Arduino or a PWM motor, the only core I knew I could quickly test on my XC9536XL was the 7 segment LED driver. When I imported the VHDL into a new Xilinx ISE project and synthesized the design, I got an error saying that my CPLD is too small. The Device Used is XC9536XL-5-VQ44, optimization goal is area, and optimization effort is high.

[Warning]:Cpld:868 - Cannot fit the design into any of the specified devices with the selected implementation options.
[Error]:Cpld - Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'gzleddrvr.ise'.
[Error]:Cpld:837 - Insufficient number of macrocells. The design needs at least 52 but only 36 left after allocating other resources.

I know I could design my own core to test this, but that'll take a little time, and I'd prefer to test my hardware with a core that's already known to work.

Using gz_test instead:
[Warning]:Cpld:868 - Cannot fit the design into any of the specified devices with the selected implementation options.
[Error]:Cpld - Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'gz_test.ise'.
[Error]:Cpld:837 - Insufficient number of macrocells. The design needs at least 54 but only 36 left after allocating other resources.

What else can you suggest to test my setup? Thank you for your continued help!
Best regards,
Peter

[guzunty]

I think the '36 surfaces different pins. In which case you will have to adjust the user constraint file at a minimum.

If its not that, have you looked through the report (.rpt) file? It should tell you which resource(s) are exhausted by any given core.

The Guzunty seven segment display driver is unlikely ever to fit into a '36 device. It needs too many flip-flops. You might be able to fit in a single or dual digit version.

[FloppidyDingo]

I know this is an old thread, but I am starting to learn about CPLD programming. I have an Altera MAX7000A and a Raspberry Pi B+. If I use the same setup for the Guzunty Pi, will it program my CPLD? If so, then what commands/tools do I use to upload the binaries to my CPLD? Also, what OS do you guys recommend for this, because I have not yet set up my Pi. My working one got fried somehow, and I've had some pretty bad experience with the OS on it (Debian?).

[guzunty]

Sorry, but gz_load, the Guzunty programmer, is based on public Xilinx code.

I doubt that it would program an Altera device. I do know it is capable of programming a range of Xilinx CPLDs, but then you'd expect that wouldn't you.

You're welcome to try and report back

Debian's ok, what problems did you have with it?

[FloppidyDingo]

Sorry, but gz_load, the Guzunty programmer, is based on public Xilinx code.

I doubt that it would program an Altera device. I do know it is capable of programming a range of Xilinx CPLDs, but then you'd expect that wouldn't you.

You're welcome to try and report back

Debian's ok, what problems did you have with it?

Okay. It doesn't matter anyway since I found out that in order to use the Pi, the CPLD has to have the JTAG pins free, otherwise I can't program the device again without a real programmer.

I've only had minor - but rather annoying - problems with Debian. First off, it took forever to get the thing to use my composite LCD, and then when I DID get it working, most of the windows that would open would have the top outside the boundries of the display while being oversized, making it impossible to click things or drag the window. Then the Wi-Fi would refuse to keep a stable connection, even though the dongle I used worked flawlessly on a regular PC. I might try it again, but this time use Raspbian.

This sucks though, I should've asked BEFORE getting the CPLD. Now I have to get a programmer...

EDIT: also forgot to mention, the control key never worked. Neither did it work for Ubuntu, or any Linux distro for that matter. Maybe it's the keyboard not being compatible, who knows.