"I've had even fewer (read, no) reports of failed builds or other problems getting the Guzunty hardware working."
I'll take you up on that!
I have just built one of your Guzunty's.I see nothing wrong with the build and have booted the Pi with the Guzunty attached.
I've installed software as per the wiki instructions and SPI is enabled.
All the jumpers are as per instructions but when I load gz_test I get the following:
Guzunty loader v5.01, portions courtesy Xilinx, Inc.
XSVF file = gz_test.xsvf
ERROR: TDO mismatch and exceeded max retries
ERROR at or near XSVF command #8. See line #8 in the XSVF ASCII file.
ERROR: TDO mismatch and exceeded max retriesExecution Time = 0.070 seconds#
I've no idea what that means any suggestions?
Guzunty can't do I2C without some external resistors. I have it in my TO DO list to experiment with this and make some cores, but yet to get around to it. The same story with 1 wire. Guzunty support for SPI is good.Part of my aims for this is to get experience with 12C.
Yup, Guzunty will eat applications like that for lunch.You can see therefore that my bottom line is an interest in the I/O cores so I can do things like switch LED's ON etc.
Please be aware that a lot of this program is making the screen look pretty. Only a very small part is actually operating or reading the CPLD pins.I looked at the 16i8o python example and failed to understand much of the program but I will come back to that another time.
Yes, there are two general ways to do this; One is to use a breakout board such as the one you linked. The other is to build a Guzunty with a long pin connector such as this:In your Magpi 14 Guzunty article you identify 25 free I/O pins on Guzunty board with 13 unused pins on the Pi.
When you say 13 pins are also available from the Pi does this mean I'd need to attach a GPIO breakout board between the Guzunty board and the Pi( such as this http://shop.ciseco.co.uk/pi-wingman-8-i ... pberry-pi/ )?
You are right about the GSR, GTS and GCK pins being dual purpose. They can be used as normal I/O pins, but they can also function as Global Reset, Global OutpuT Enable and Global ClocK respectively. For example, by routing clock signals to a GCK input rather than a general purpose I/O pin, you can make the finite resources of the CPLD go much further. This is why Pi GPIO4 is routed to GCK1 (check the schematic to see this), GPIO4 can be programmed to provide a hardware clock from the Raspberry Pi.In your Magpi 14 Guzunty article you identify 25 free I/O board pins but on the Guzunty FAQ you say 'leaves an additional 30 IO pins available for expansion on the CPLD' as opposed to the 25 you previously identified on the board.
Looking at the pins without jumpers I count 34 board pins (I'm ignoring the power and Jumper pins.), I see three which seem to be dedicated or dual use pins eg GSR,GTS1 and GTS2 the rest of the pins are divided into functional blocks (FB) such as FB1 etc , Pin numberings appear in more than one FB eg pin 17 is in FB2 and in FB3.Pins 1, 2 and three are outside an FB but pins 2 and 5 are also in FB's .
No. It's much simpler than that. To save space on the PCB, we only write the main FB number once, so FB1-2 is found by first locating 'FB1', then you locate the pin labeled 2. Similarly to locate FB2-2, you first find FB2, then find I/O pin 2 associated with it. So you can see that aren't multiple references to the same pin 2, there are four channel 2's, one in each of FB1, FB2, FB3 and FB4.Pins 1 and three seem only to have one instance. But pin 2 has three, one outside an FB and three inside an FB.
Is pin 17 in FB2 the same as pin 17 in FB3?
Yes, the Xilinx data sheet is a bit terse. Data sheets for all devices take a bit of getting used to, TBH. Stick with it and you'll get there. In the case of the XC9572XL, it's made slightly more complex by the fact that there are two separate data sheets; one describing the properties of the device family and the other specifying the pinouts specific to the 9572 itself (and the different pinouts for the 4 different packages the device can be delivered in, help! You are only interested in the PC44 package).I can't see anything on the Guzunty wiki to help me and the Xilinx datasheet is way above my head for the moment.
Code: Select all
** 9 Outputs ** Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init Name Pts Inps No. Type Use Mode Rate State outputs<6> 3 7 FB1_11 6~ GCK/I/O O STD FAST RESET outputs<7> 3 7 FB1_14 7~ GCK/I/O O STD FAST RESET outputs<0> 3 7 FB3_14 19 I/O O STD FAST RESET outputs<1> 3 7 FB3_15 20 I/O O STD FAST RESET outputs<2> 3 7 FB3_16 24 I/O O STD FAST RESET outputs<3> 3 7 FB3_17 22 I/O O STD FAST RESET outputs<4> 3 7 FB4_2 25 I/O O STD FAST RESET outputs<5> 3 7 FB4_5 26 I/O O STD FAST RESET miso 17 21 FB4_17 34 I/O O STD FAST
Hi Derekguzunty wrote:For anyone who is interested, we're expecting Guzunty will be Pi Model B+ compatible.
We've ordered a board and will confirm this (tomorrow hopefully).
Analog inputs are possible, but without adding some codec hardware.
Hope that helps,