I have written a device driver for manipulating the GPIO lines directly without going via the memory mapping device. The module decodes some ioctl commands and writes some values to registers of which values have been set up in the parameters to the ioctl.
In order to run this code you will need to be able to compile and install a kernel module so you will need to get kernel sources and the associated files for that. The makefile for the driver has an install target for which you need to be root to install but once installed you can run it in normal user mode.
The interface which sets up the ioctl commands is made into two files. The C file has a small test main function in it to drive the first 6 GPIO lines in sequence.
You can get a small demo video (XviD) of it running here.
The zip of the driver and the interface code is here.
The driver code includes a prebuilt .ko module and prebuilt gpio.exe file assuming that you have a raspian wheezy 3.2.27+ kernel. Otherwise you will need to compile it.
I have released this code as dual BSD / GPL for maximum freedom so you can use this one commercially under the BSD license if you require. I will probably expand on this for my own nefarious reasons and may or may not update it. I'm posting it because I see a lot of people wanting to use GPIO stuff and if you find that any other method is not fast enough then this one is about as fast as it could get - if you stay in the driver. I will be needing to send out batches of IO patterns as fast as possible to drive an IO expander which I will be building or driving IO signals into PICs so id like to run groups of maybe 256 IO writes in one go and I dont want to make 256 kernel transitions with 512 memory barriers in the way.
On the subject of memory barriers. Since I am not an ARM expert I have a general question to which I have seen some replies to it on this forum but they are not really answers. So I think the question is still open...
The BCM spec says that we need to insert a read or a write memory barrier around the use of GPIO lines. The ARM TRM spec ( 3-83 and 3-84) says that there are two type of memory barrier related calls. One is a DATA SYNC and one is a DATA MEM barrier. Both seem to be similar in nature. Which of them would be considered the read or write memory barrier. The driver code at the moment is using the DATA SYNC one. The BCM spec and the ARM specs dont quite align here so its a bit confusing.
Otherwise, enjoy and hope this may help some people.
Just some notes about the video. Its not very clear so I am in the Driver dir. Then I type "make" then "sudo make install" then it installs the driver and shows the kernel message pop up showing the driver has been installed. Then I "cd .." then "make" for the interface test. Then "./gpio.exe" to run it and the LEDs flash.
The red LED is power only. The yellow ones are the first 6 GPIO lines. I used a hacked up PATA old hard drive cable, sawn off 2x10 pins worth of header. Stripped back some of the cable lines and exposed the 3V3, 5V, GND and the GPIO0 to 5 lines.
They go into my breadboard which has them into a 1K ohm resistor each then into the LEDs which are 2mA low current types.