Look at the two "sub sp,sp" instructions, the compiler has chosen a 32-bit insn for the larger constant.
Code: Select all
.type Disk_to_mem, %function
Disk_to_mem:
2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} @
8946 mov r9, r1 @ vs_u, vs_u
@ try.c:3478: const int fd = in_fd ? : open( fname, O_RDONLY );
1646 mov r6, r2 @ in_fd, in_fd
@ try.c:3475: {
ADF5403D sub sp, sp, #196608 @,,
98B0 sub sp, sp, #96 @,,
@ try.c:3478: const int fd = in_fd ? : open( fname, O_RDONLY );
1AB9 cbnz r2, .L1249 @ in_fd,
@ try.c:3478: const int fd = in_fd ? : open( fname, O_RDONLY );
1146 mov r1, r2 @, in_fd
FFF7FEFF bl open @
0646 mov r6, r0 @ in_fd,
.L1249:
@ try.c:3480: if( fd < 0 )
002E cmp r6, #0 @ in_fd,
07DA bge .L1250 @,
@ try.c:3481: return fail(0);
0020 movs r0, #0 @,
.L1281:
@ try.c:3570: return fail(0);
FDF717FB bl fail @
.L1279:
@ try.c:3573: }
0DF5403D add sp, sp, #196608 @,,
18B0 add sp, sp, #96 @,,
@ sp needed @
BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} @
.L1250:
@ try.c:3483: if( fstat( fd, &details ) != 0 )
02A9 add r1, sp, #8 @ tmp196,,
3046 mov r0, r6 @, in_fd
FFF7FEFF bl fstat @
0DF16008 add r8, sp, #96 @ tmp144,,
0246 mov r2, r0 @ _1,
08B1 cbz r0, .L1252 @ _1,
.L1282:
@ try.c:3509: return fail(fd);
3046 mov r0, r6 @, in_fd
EEE7 b .L1281 @
.L1252:
@ try.c:3487: if( S_ISREG(fm) )
069C ldr r4, [sp, #24] @ details.st_mode, details.st_mode
04F47044 and r4, r4, #61440 @ _2, details.st_mode,
B4F5004F cmp r4, #32768 @ _2,
2CD1 bne .L1253 @,
@ try.c:2304: posix_fadvise( fd, 0, 0, POSIX_FADV_SEQUENTIAL );
0146 mov r1, r0 @, tmp2
0223 movs r3, #2 @,
3046 mov r0, r6 @, in_fd
FFF7FEFF bl posix_fadvise @
.L1254:
@ try.c:3516: if( vs_u == in_u )
3D4B ldr r3, .L1283 @ tmp153,
5B69 ldr r3, [r3, #20] @ in_u, in_u
4B45 cmp r3, r9 @ in_u, vs_u
07D1 bne .L1257 @,
@ try.c:3518: if( S_ISREG(fm) )
B4F5004F cmp r4, #32768 @ _2,
36D1 bne .L1258 @,