phofman
Posts: 21
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Possible to replace RPi4 54MHz crystal with different frequency?

Mon Aug 03, 2020 8:34 pm

Hi,

Please if the 54MHz crystal were replaced with 49.152MHz crystal, would it suffice to change the value in https://github.com/raspberrypi/linux/bl ... .dtsi#L392 and rebuild the device tree files? Or is the 54MHz value hard-coded somewhere in the VideoCore firmware? 49.152MHz "osc" frequency would allow no-PLL straight integer-divider generation of I2S signal for 48kHz audio multiples out of the box as the "osc" is already one of the parent clocks for the PCM clock. I have tested that when samplerate is integer-divided from 54MHz (e.g. 46.875kHz), the I2S bitclock is generated from the osc clock, correctly and cleanly.

Thanks a lot for any insight.

Pavel.

jdb
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Re: Possible to replace RPi4 54MHz crystal with different frequency?

Mon Aug 03, 2020 9:13 pm

The chip won't work with a different crystal frequency. There are fixed divider ratios in hardware scattered across the chip that expect 54MHz to be distributed to various PHYs. Notably, SDRAM won't work.

If you need jitter-free I2S clocks, then use an I2S codec that can drive the clock as a master from its own internal crystal/PLL.
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cleverca22
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Re: Possible to replace RPi4 54MHz crystal with different frequency?

Mon Aug 03, 2020 11:39 pm

phofman wrote:
Mon Aug 03, 2020 8:34 pm
49.152MHz "osc" frequency would allow no-PLL straight integer-divider generation of I2S signal for 48kHz audio multiples out of the box as the "osc" is already one of the parent clocks for the PCM clock. I have tested that when samplerate is integer-divided from 54MHz (e.g. 46.875kHz), the I2S bitclock is generated from the osc clock, correctly and cleanly.
why is a no-pll a requirement?

a much simpler solution (which may still require firmware changes), is to just tweak one of the PLL's to run at a slightly different freq, then use int division to make 48khz

your request was 49.152mhz/1024 == 48khz clean

PLLC looks like the best choice, its not involved in anything that critical (dram, displays) so it could be freely played with, once you re-calc the sd/uart divisors
according to my old pastebins it runs at 3ghz by default, with a /5 divisor for the peripheral channel

600mhz/12500 gives you a perfect 48khz, and i think the divisor is 24 bits wide, so that should work without even messing with the PLL!

https://github.com/raspberrypi/linux/bl ... 1600-L1618
and the driver goes out of its way to deny access to pllc_per!

editing that part of the code may solve everything

phofman
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Re: Possible to replace RPi4 54MHz crystal with different frequency?

Tue Aug 04, 2020 5:46 am

jdb wrote:
Mon Aug 03, 2020 9:13 pm
The chip won't work with a different crystal frequency. There are fixed divider ratios in hardware scattered across the chip that expect 54MHz to be distributed to various PHYs. Notably, SDRAM won't work.
Thanks a lot for the key info. I will not touch it then.
If you need jitter-free I2S clocks, then use an I2S codec that can drive the clock as a master from its own internal crystal/PLL.
I am looking at options to explore the existing HW at max. Apparently the way of crystal replacement is not a viable one. Good to learn :-)

phofman
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Re: Possible to replace RPi4 54MHz crystal with different frequency?

Tue Aug 04, 2020 6:05 am

cleverca22 wrote:
Mon Aug 03, 2020 11:39 pm
why is a no-pll a requirement?
The intention was to check if minimizing jitter by avoiding the PLL was possible.

PLLC looks like the best choice, its not involved in anything that critical (dram, displays) so it could be freely played with, once you re-calc the sd/uart divisors
according to my old pastebins it runs at 3ghz by default, with a /5 divisor for the peripheral channel

600mhz/12500 gives you a perfect 48khz, and i think the divisor is 24 bits wide, so that should work without even messing with the PLL!
Thanks a lot for the info about accessing the clock tree, very useful.

Unfortunately the PCM/I2S peripheral requires bit clock at 64x fs (resp. 48x fs) which does not fit the default 3GHz/600MHz for 48kHz fs.
https://github.com/raspberrypi/linux/bl ... 1600-L1618 and the driver goes out of its way to deny access to pllc_per!
Thanks, no problem with adding other PLLs, but:

1) Please how can I re-tune PLLC on RPi4? I tried dt-blob.bin but RPi4 did not boot up viewtopic.php?f=107&t=281856&p=1707154#p1707154

2) The clk-bcm2835.c mentions only PLLD is not affected by varying rates (power management freq. scaling?). Please does it hold for RPi4 too? Is there a way to learn which clock source on RPi4 is constant at any operation mode?

Thanks a lot,

Pavel.

cleverca22
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Re: Possible to replace RPi4 54MHz crystal with different frequency?

Tue Aug 04, 2020 6:58 am

i would say any pll that is driving the uart/spi/pcm peripherals will be at a constant frequency, because the firmware&linux dont want to deal with clock glitches and re-doing divisors constantly

so you just need to look at the clk_summary and find a PLL like that, and then find some way to force it to a more desirable frequency

for reference, the reason the miniuart baud rate has trouble, is that it doesnt have a clock mux to select a certain PLL, its always ran by the vpu clock via pllc_core0 and pllc

and the firmware is normally going to vary the vpu clock dynamically, based on vpu load%

when you enable the mini-uart in config.txt, that also tells the firmware to stop messing with vpu/pllc_core0/pllc, and makes those clocks fixed

some of those clocks can also be changed via config.txt, with things like gpu_freq= and core_freq=

you might be able to play with those freq things in config.txt, and get one of the _per channels to a frequency of use to you, and then hand the pcm off that


i think the root problem your trying to solve, is that the mash filter (for fractional division from *_per -> pcm) has a crap-ton of jitter
but the PLL's are much more stable, so they can tune to a higher freq, which you then divide back down (using pure integer division)

that also ties into why composite is off by default (mash filters break it? so the code must set the pll to a certain freq, which conflicts with other stuff)
and why composite and hdmi cant run at once

jamesh
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Re: Possible to replace RPi4 54MHz crystal with different frequency?

Tue Aug 04, 2020 7:27 am

In order to get the right composite clock on the pi4, we need to run some clocks more slowly. So it's disabled by default so the performance hit isn't experienced by everyone.
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cleverca22
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Re: Possible to replace RPi4 54MHz crystal with different frequency?

Tue Aug 04, 2020 7:57 am

jamesh wrote:
Tue Aug 04, 2020 7:27 am
In order to get the right composite clock on the pi4, we need to run some clocks more slowly. So it's disabled by default so the performance hit isn't experienced by everyone.
and we can do the same to get a perfect 48khz pcm clock

48khz * 64 is 3.072mhz

if you set:

Code: Select all

gpu_freq=307.2
(assuming it allows floats) then something along the pllc->pllc_core0->vpu chain will be 307.2mhz, (close enough to not harm gpu performance much?)
and then you can /100 that to get the required 3.072mhz for pcm

would just need to experiment a bit, and verify with clk_summary, then patch linux to allow using that channel on the mux

edit:
1st problem, gpu_freq is int only, but that can be solved with gpu_freq=384
384mhz/125 == 3.072mhz, still perfect integer division

2nd problem:
pllc is running at 1,705,032,681hz
* pllc_per at 341,006,537hz (mash filter near /5)
* pllc_core0 at 568,344,227hz (clean /3)
* * vpu is at the requested 384mhz exact (mash filter near /1.48)

i deleted my config.txt by accident while un-bricking the eeprom, and now pllc is a whacky clock, even with a completely commented out config.txt
what could i have been doing before, to get a 3ghz pllc, that i'm not doing now....
or maybe it was a firmware update? i did also delete start4.elf, and let apt-get upgrade restore it back to the "proper" one after booting one from git temporarily

would it be too much to ask, for config.txt to just directly allow a pllc_freq and pllc_per_freq option, and then calc all divisors based on those??

phofman
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Re: Possible to replace RPi4 54MHz crystal with different frequency?

Tue Aug 04, 2020 9:00 am

Thanks. The description at https://www.raspberrypi.org/documentati ... locking.md says for RPi4:
It is recommended when overclocking to use the individual frequency settings (isp_freq, v3d_freq etc) rather than gpu_freq, as since it attempts to set core_freq (which cannot be changed on the Pi 4), it is not likely to have the desired effect.
Please is there any summary writeup of the available clocks and their "adjustability" for RPi4? And which file is the correct one to change PLLx frequency + PLLx_PER ratio on RPi4? Thanks a lot.

phofman
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Re: Possible to replace RPi4 54MHz crystal with different frequency?

Tue Aug 04, 2020 6:34 pm

I tried changing PLLA (in dt-blob.bin) - no boot. PLLC - no change. PLLD - in one case the PLLD clock changed to a very different value than requested, in second case PLLD clock remained the same but the emmc/emmc2 clock changed (i.e. the divider was changed). I know things are not random but I wish I could find the place where the algorithm for clock setup is specified. I tend to start thinking the clocks in RPi4 are so tightly configured for the hardware that changing them in a controlled manner for specific purposes is impossible.

It's a pitty there is no external clock input for one of the programmable dividers, it would be a very useful clock feature, eliminating need for external clock arrangements configurable by RPi GPIOs.

jamesh
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Re: Possible to replace RPi4 54MHz crystal with different frequency?

Tue Aug 04, 2020 6:55 pm

phofman wrote:
Tue Aug 04, 2020 6:34 pm
I tend to start thinking the clocks in RPi4 are so tightly configured for the hardware that changing them in a controlled manner for specific purposes is impossible.
Almost certainly the case. Clocks are a juggling nightmare in the firmware. A couple of years ago I was trying to get a DSI->HDMI bridge chip going, and getting the clocks right for that meant all sorts of pain elsewhere in the system - I think it killed composite or something. We gave up in the end. Just not enough clocks to go round, along with other issues.

Why so few clocks? They take up LOADS of die space so are expensive.
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jdb
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Re: Possible to replace RPi4 54MHz crystal with different frequency?

Tue Aug 04, 2020 7:19 pm

jamesh wrote:
Tue Aug 04, 2020 6:55 pm


Why so few clocks? They take up LOADS of die space so are expensive.
Specifically it's PLLs that are expensive. They're the only type of clock source capable of generating arbitrary frequencies from a fixed reference and are big, power-hungry chunks of silicon that need separate supply voltages and for optimal performance need to be placed close to where they need to deliver their clocks.

Case in point - on BCM2711, the ARM PLL is located right inside the CPU cluster and can't be used by anything else in the chip. All the others have multiple constraints and demands, because typically early on in the design phase there's a big spreadsheet of "these are the things we want this chip to do, so these are the clock features that we need" - and it's basically immutable from that point onwards.
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phofman
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Re: Possible to replace RPi4 54MHz crystal with different frequency?

Tue Aug 04, 2020 7:45 pm

jdb, jamesh: Thanks a lot for your confirmation. I will spend my time on something else then.

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