andrum99 wrote: ↑
Fri Sep 20, 2019 6:45 am
I see. I'm guessing it has similar limitations to dwc_otg, namely that it is meant to be used in either OTG mode or host mode with a single device attached, as it might be used in a set top box for example. Presumably the other data lines to enable USB 3 are disconnected on Pi 4? I wonder if they might find their way to the edge connector on the CM4?
Just to clear some of this up...
The Pi4 SoC has one PCIe lane. It is connected to device that serves as a USB hub with two USB 2 ports and 2 USB 3 ports. They are all host only. The SoC has a legacy, internal, USB 2 port. On a Pi4B, the USB 2 is wired to the USB-C power connection. The USB 2 port can be either host or client.
As a side note, since your typical USB 3 port isn't going to supply the kind of current a Pi4B requires, you would either have to construct a special cable to provide power from one source and data from another for the Pi4B USB-C connector, or power the Pi4B some other way, such as through a GPIO +5v pin, or via the PoE HAT.
So far, nothing has been said about what and how interfaces will be exposed if there is a CM4. Part of the problem is that, if everything is exposed (like the CM, CM3, and CM3+), there aren't enough contacts on the current 200-contact form factor. So either some things are going to have to be left off, or a new connector (240 and 288 have been suggested) will have to be used. My own feeling is that the best way to go would be 288 contacts on the grounds that even more may be need in the future and that will delay to pint at which a third form factor will be required.
On top of all that, bear in mind that there has never been a CM2, so it is possible that the next iteration of the CM-series may not be a CM4 at all.