RPI3 - Cycle Count Register

[Zonta]

Hi everybody,

I need to benchmark some code I wrote on a Raspberry 3 board.
I tried the code mentioned in this post viewtopic.php?f=63&t=155498 but I am sure it didn't work because the BRCM on the Raspberry Zero is not the same as the one in the board I am using.

Can you please point me in a good direction so I can get this to work?

Thanks in advance for your time!

With my best regards,

[Zonta]

Just a note: I am working with Raspbian with 32bits architecture for now!

[Zonta]

I am still experiencing some trouble with this.
So far, this is where what I found:
1/ I implemented the following kernelside:

Code: Select all

	int enable_divider;
	int do_reset;
	int value;

  	enable_divider  = 1;
	do_reset = 0;
	value = 1;

    asm volatile ("mcr p15, 0, %0, c9, c14, 0" :: "r" (1));
	// peform reset:
	if (do_reset) {
		value |= 2; // reset all counters to zero.
		value |= 4; // reset cycle counter to zero.
	}
	if (enable_divider)
		value |= 8; // enable "by 64" divider for CCNT
	value |= 16;
	// program the performance-counter control-register with mask constructed above
	asm volatile ("MCR p15, 0, %0, c9, c12, 0\t\n" :: "r"(value));
	// enable all counters:
	asm volatile ("MCR p15, 0, %0, c9, c12, 1\t\n" :: "r"(0x8000000f));
	// clear overflows:
	asm volatile ("MCR p15, 0, %0, c9, c12, 3\t\n" :: "r"(0x80000001));
	// Select individual counter (0)
	asm volatile ("MCR p15,   0,    %0,  c9  ,   c12 ,   5\t\n":: "r"(0x00));
	// Write event (0x11 = Cycle count)
	asm volatile ("MCR p15,   0,    %0,  c9  ,   c13 ,   1\t\n":: "r"(0xD));

2/And from Userside, this is what I use to get the CCR value:

Code: Select all

asm volatile ("MRC p15,   0,    %0,  c9  ,   c13 ,   0\t\n": "=r"(cc));

But the results with the timing tests I made are not very consistent and they do not show correct timing results.

Has anybody managed to make this work?

[joan]

It may be worth while to look through or ask on the bare metal forum.

[LdB]

From your other discussions you are doing this inside linux so it's out of my league.

However lets do the basic, the Pi3 has 4 cores so there are 4 performance registers (1 for each core) and you will require correct privileges to access them.

The Pi1 code works for me on the Pi3 in baremetal but I have got the other 3 cores parked and not in use and got the core down in normal service mode and set the non secure register access mode when I execute them. Sorry no idea how you do that under linux which is what you really need answered.

[dwelch67]

this is a bare metal forum.

[Zonta]

From your other discussions you are doing this inside linux so it's out of my league.

However lets do the basic, the Pi3 has 4 cores so there are 4 performance registers (1 for each core) and you will require correct privileges to access them.

The Pi1 code works for me on the Pi3 in baremetal but I have got the other 3 cores parked and not in use and got the core down in normal service mode and set the non secure register access mode when I execute them. Sorry no idea how you do that under linux which is what you really need answered.

Sorry for the late reply, I have put this aside for some time, and now I am back.

Looking at what you said, I configured the registers on the 4 cores and I am reading the cycle count register on the first core only with the command "tasket -c 0 ./test" which means execute the ./test program on core 0. My problem now is that for 1 second, I get values around 6482703. I have a fixed frequency of 700MHz, so 6482703 / 700 = 10 which means, if the measurment is correct, I have a factor of 10 and I don't know where it came from.

Have you encountered something like this?